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2015-10-02cpu/apic: drop icc bus/bridgeChen Fan1-8/+1
After CPU hotplug has been converted to BUS-less hot-plug infrastructure, the only function ICC bus performs is to propagate reset to LAPICs. However LAPIC could be reset by registering its reset handler after all device are initialized. Do so and drop ~30LOC of not needed anymore ICCBus related code. Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Signed-off-by: Zhu Guihua <zhugh.fnst@cn.fujitsu.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-10-02apic: move APIC's MMIO region mapping into APICChen Fan1-0/+15
When ICC bus/bridge is removed, APIC MMIO will be left unmapped since it was mapped into system's address space indirectly by ICC bridge. Fix it by moving mapping into APIC code, so it would be possible to remove ICC bus/bridge code later. Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Signed-off-by: Zhu Guihua <zhugh.fnst@cn.fujitsu.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-10-02Correctly re-init EFER state during INIT IPIBill Paul1-1/+1
When doing a re-initialization of a CPU core, the default state is to _not_ have 64-bit long mode enabled. This means the LME (long mode enable) and LMA (long mode active) bits in the EFER model-specific register should be cleared. However, the EFER state is part of the CPU environment which is preserved by do_cpu_init(), so if EFER.LME and EFER.LMA were set at the time an INIT IPI was received, they will remain set after the init completes. This is contrary to what the Intel architecture manual describes and what happens on real hardware, and it leaves the CPU in a weird state that the guest can't clear. To fix this, the 'efer' member of the CPUX86State structure has been moved to an area outside the region preserved by do_cpu_init(), so that it can be properly re-initialized by x86_cpu_reset(). Signed-off-by: Bill Paul <wpaul@windriver.com> CC: Paolo Bonzini <pbonzini@redhat.com> CC: Richard Henderson <rth@twiddle.net> CC: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-10-02target-i386: add ABM to Haswell* and Broadwell* CPU modelsPaolo Bonzini1-4/+4
ABM is only implemented as a single instruction set by AMD; all AMD processors support both instructions or neither. Intel considers POPCNT as part of SSE4.2, and LZCNT as part of BMI1, but Intel also uses AMD's ABM flag to indicate support for both POPCNT and LZCNT. It has to be added to Haswell and Broadwell because Haswell, by adding LZCNT, has completed the ABM. Tested with "qemu-kvm -cpu Haswell-noTSX,enforce" (and also with older machine types) on an Haswell-EP machine. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-10-02target-i386: get/put MSR_TSC_AUX across reset and migrationAmit Shah1-0/+14
There's one report of migration breaking due to missing MSR_TSC_AUX save/restore. Fix this by adding a new subsection that saves the state of this MSR. https://bugzilla.redhat.com/show_bug.cgi?id=1261797 Reported-by: Xiaoqing Wei <xwei@redhat.com> Signed-off-by: Amit Shah <amit.shah@redhat.com> CC: Paolo Bonzini <pbonzini@redhat.com> CC: Juan Quintela <quintela@redhat.com> CC: "Dr. David Alan Gilbert" <dgilbert@redhat.com> CC: Marcelo Tosatti <mtosatti@redhat.com> CC: Richard Henderson <rth@twiddle.net> CC: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-10-02target-i386: Make check_hw_breakpoints staticRichard Henderson2-2/+1
The function is now only used from within a single file. Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-10-02target-i386: Move breakpoint related functions to new fileRichard Henderson4-163/+183
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-10-02target-i386: Convert kvm_default_*features to property/value pairsEduardo Habkost2-39/+59
Convert the kvm_default_features and kvm_default_unset_features arrays into a simple list of property/value pairs that will be applied to X86CPU objects when using KVM. Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-09-25i386: interrupt poll processingPavel Dovgalyuk1-0/+3
This patch updates x86_cpu_exec_interrupt function. It can process two interrupt request at a time (poll and another one). This makes its execution non-deterministic. Determinism is requred for recorded icount execution. Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Message-Id: <20150917162410.8676.13042.stgit@PASHA-ISP.def.inno> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-09-25i386: partial revert of interrupt poll fixPavel Dovgalyuk1-8/+2
Processing CPU_INTERRUPT_POLL requests in cpu_has_work functions break the determinism of cpu_exec. This patch is required to make interrupts processing deterministic. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Message-Id: <20150917162331.8676.15286.stgit@PASHA-ISP.def.inno> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-09-25i386: Rename ELF_MACHINE to be x86 specificPeter Crosthwaite1-2/+2
Rename ELF_MACHINE to be I386 specific. This is used as-is by the multiboot loader. Linux-user previously used this definition but will not anymore, falling back to the default bahaviour of using ELF_ARCH as ELF_MACHINE. This removes another architecture specific definition from the global namespace. Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Richard Henderson <rth@twiddle.net> Cc: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Acked-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Acked-By: Riku Voipio <riku.voipio@linaro.org> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-09-25hmp: implemented io apic dump state for TCGPavel Butsykin1-0/+2
Added support emulator for the hmp command "info ioapic" Signed-off-by: Pavel Butsykin <pbutsykin@virtuozzo.com> Signed-off-by: Denis V. Lunev <den@openvz.org> CC: Paolo Bonzini <pbonzini@redhat.com> CC: Andreas Färber <afaerber@suse.de> Message-Id: <1442927901-1084-10-git-send-email-den@openvz.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-09-25hmp: added io apic dump statePavel Butsykin1-0/+9
Added the hmp command to query io apic state, may be usefull after guest crashes to understand IRQ routing in guest. Implementation is only for kvm here. The dump will look like (qemu) info ioapic ioapic id=0x00 sel=0x26 (redir[11]) pin 0 0x0000000000010000 dest=0 vec=0 active-hi edge masked fixed physical pin 1 0x0000000000000031 dest=0 vec=49 active-hi edge fixed physical ... pin 23 0x0000000000010000 dest=0 vec=0 active-hi edge masked fixed physical IRR (none) Remote IRR (none) Signed-off-by: Pavel Butsykin <pbutsykin@virtuozzo.com> Signed-off-by: Denis V. Lunev <den@openvz.org> CC: Paolo Bonzini <pbonzini@redhat.com> CC: Andreas Färber <afaerber@suse.de> Message-Id: <1442927901-1084-9-git-send-email-den@openvz.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-09-25hmp: added local apic dump statePavel Butsykin3-0/+200
Added the hmp command to query local apic registers state, may be usefull after guest crashes to understand IRQ routing in guest. (qemu) info lapic dumping local APIC state for CPU 0 LVT0 0x00010700 active-hi edge masked ExtINT (vec 0) LVT1 0x00000400 active-hi edge NMI LVTPC 0x00010000 active-hi edge masked Fixed (vec 0) LVTERR 0x000000fe active-hi edge Fixed (vec 254) LVTTHMR 0x00010000 active-hi edge masked Fixed (vec 0) LVTT 0x000000ef active-hi edge one-shot Fixed (vec 239) Timer DCR=0x3 (divide by 16) initial_count = 61360 SPIV 0x000001ff APIC enabled, focus=off, spurious vec 255 ICR 0x000000fd physical edge de-assert no-shorthand ICR2 0x00000001 cpu 1 (X2APIC ID) ESR 0x00000000 ISR (none) IRR 239 APR 0x00 TPR 0x00 DFR 0x0f LDR 0x00 PPR 0x00 Signed-off-by: Pavel Butsykin <pbutsykin@virtuozzo.com> Signed-off-by: Denis V. Lunev <den@openvz.org> CC: Paolo Bonzini <pbonzini@redhat.com> CC: Andreas Färber <afaerber@suse.de> Message-Id: <1442927901-1084-7-git-send-email-den@openvz.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-09-25utils: rename strtosz to use qemu prefixMarc-André Lureau1-2/+2
Not only it makes sense, but it gets rid of checkpatch warning: WARNING: consider using qemu_strtosz in preference to strtosz Also remove get rid of tabs to please checkpatch. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <1442419377-9309-1-git-send-email-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-09-16Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell7-3/+558
* Linux header update and cleanup * Support for HyperV crash report * Cleanup of target-specific HMP commands * Multiarch batch * Checkpatch fix for Perl 5.22 * NBD fix * Revert incorrect commit 5243722376 # gpg: Signature made Wed 16 Sep 2015 16:39:01 BST using RSA key ID 78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" * remotes/bonzini/tags/for-upstream: (24 commits) nbd: release exp->blk after all clients are closed checkpatch: Escape left braces in regex monitor: uninclude cpu_ldst include/exec: Move cputlb exec.c defs out cputlb: Change tlb_set_dirty() arg to cpu cputlb: move CPU_LOOP() for tlb_reset() to exec.c translate: move real_host_page setting to -common tcg: Move tci_tb_ptr to -common tcg: split tcg_op_defs to -common translate-all: Move tcg_handle_interrupt() to -common cpu-exec: Migrate some generic fns to cpu-exec-common qemu-char: Use g_new() & friends where that makes obvious sense monitor: added generation of documentation for hmp-commands-info.hx hmp-commands.hx: fix end of table info monitor: remove target-specific code from monitor.c hmp-commands-info: move info_cmds content out of monitor.c i386/kvm: Hyper-v crash msrs set/get'ers and migration kvm: Add kvm system event crash handler cpu: Add crash_occurred flag into CPUState target-i386: move asm-x86/hyperv.h to standard-headers ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-16monitor: remove target-specific code from monitor.cPavel Butsykin2-1/+495
Move target-specific code out of /monitor.c to /target-*/monitor.c, this will avoid code cluttering and using random ifdeffery. The solution is quite simple, but solves the issue of the separation of target-specific code from monitor. Signed-off-by: Pavel Butsykin <pbutsykin@virtuozzo.com> Signed-off-by: Denis V. Lunev <den@openvz.org> CC: Paolo Bonzini <pbonzini@redhat.com> CC: Peter Maydell <peter.maydell@linaro.org> Message-Id: <1441899541-1856-3-git-send-email-den@openvz.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-09-16i386/kvm: Hyper-v crash msrs set/get'ers and migrationAndrey Smetanin5-1/+62
KVM Hyper-V based guests can notify hypervisor about occurred guest crash by writing into Hyper-V crash MSR's. This patch does handling and migration of HV_X64_MSR_CRASH_P0-P4, HV_X64_MSR_CRASH_CTL msrs. User can enable these MSR's by 'hv-crash' option. Signed-off-by: Andrey Smetanin <asmetanin@virtuozzo.com> Signed-off-by: Denis V. Lunev <den@openvz.org> CC: Paolo Bonzini <pbonzini@redhat.com> CC: Andreas Färber <afaerber@suse.de> Message-Id: <1435924905-8926-13-git-send-email-den@openvz.org> [Folks, stop abrviating variable names!!! Also fix compilation on non-Linux/x86. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-09-16target-i386: move asm-x86/hyperv.h to standard-headersPaolo Bonzini1-1/+1
The Hyper-V definitions are an industry standard and can be used from code that is not KVM-specific. Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-09-15target-i386: exception handling for other helper functionsPavel Dovgalyuk3-6/+6
This patch fixes exception handling for other helper functions. Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-09-15target-i386: exception handling for seg_helper functionsPavel Dovgalyuk3-327/+335
This patch fixes exception handling for seg_helper functions. Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-09-15target-i386: exception handling for memory helpersPavel Dovgalyuk2-26/+18
This patch fixes exception handling for memory helpers and removes obsolete PC update from translate.c. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-09-15target-i386: exception handling for div instructionsPavel Dovgalyuk2-24/+16
This patch fixes exception handling for div instructions and removes obsolete PC update from translate.c. Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-09-15target-i386: exception handling for FPU instructionsPavel Dovgalyuk2-93/+95
This patch fixes exception handling for FPU instructions and removes obsolete PC update from translate.c. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-09-15target-i386: introduce new raise_exception functionsPavel Dovgalyuk2-13/+21
This patch introduces new versions of raise_exception functions that receive TB return address as an argument. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-09-14Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell3-3/+27
* Support for jemalloc * qemu_mutex_lock_iothread "No such process" fix * cutils: qemu_strto* wrappers * iohandler.c simplification * Many other fixes and misc patches. And some MTTCG work (with Emilio's fixes squashed): * Signal-free TCG kick * Removing spinlock in favor of QemuMutex * User-mode emulation multi-threading fixes/docs # gpg: Signature made Thu 10 Sep 2015 09:03:07 BST using RSA key ID 78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" * remotes/bonzini/tags/for-upstream: (44 commits) cutils: work around platform differences in strto{l,ul,ll,ull} cpu-exec: fix lock hierarchy for user-mode emulation exec: make mmap_lock/mmap_unlock globally available tcg: comment on which functions have to be called with mmap_lock held tcg: add memory barriers in page_find_alloc accesses remove unused spinlock. replace spinlock by QemuMutex. cpus: remove tcg_halt_cond and tcg_cpu_thread globals cpus: protect work list with work_mutex scripts/dump-guest-memory.py: fix after RAMBlock change configure: Add support for jemalloc add macro file for coccinelle configure: factor out adding disas configure vhost-scsi: fix wrong vhost-scsi firmware path checkpatch: remove tests that are not relevant outside the kernel checkpatch: adapt some tests to QEMU CODING_STYLE: update mixed declaration rules qmp: Add example usage of strto*l() qemu wrapper cutils: Add qemu_strtoull() wrapper cutils: Add qemu_strtoll() wrapper ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-11tlb: Add "ifetch" argument to cpu_mmu_index()Benjamin Herrenschmidt2-2/+2
This is set to true when the index is for an instruction fetch translation. The core get_page_addr_code() sets it, as do the SOFTMMU_CODE_ACCESS acessors. All targets ignore it for now, and all other callers pass "false". This will allow targets who wish to split the mmu index between instruction and data accesses to do so. A subsequent patch will do just that for PowerPC. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Message-Id: <1439796853-4410-2-git-send-email-benh@kernel.crashing.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-09-11maint: remove unused include for signal.hDaniel P. Berrange1-1/+0
A number of files were including signal.h but not using any of the functions it provides Signed-off-by: Daniel P. Berrange <berrange@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2015-09-09replace spinlock by QemuMutex.KONRAD Frederic3-3/+27
spinlock is only used in two cases: * cpu-exec.c: to protect TranslationBlock * mem_helper.c: for lock helper in target-i386 (which seems broken). It's a pthread_mutex_t in user-mode, so we can use QemuMutex directly, with an #ifdef. The #ifdef will be removed when multithreaded TCG will need the mutex as well. Signed-off-by: KONRAD Frederic <fred.konrad@greensocs.com> Message-Id: <1439220437-23957-5-git-send-email-fred.konrad@greensocs.com> Signed-off-by: Emilio G. Cota <cota@braap.org> [Merge Emilio G. Cota's patch to remove volatile. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-08-13target-i386: Remove x86_cpu_compat_set_features()Eduardo Habkost2-29/+0
The function is not used by PC code anymore and can be removed. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-07-24target-i386/FPU: a misprint in helper_fistll_ST0Dmitry Poletaev1-1/+1
There is a cut-and-paste mistake in the patch https://lists.gnu.org/archive/html/qemu-devel/2014-11/msg01657.html . It cause errors in guest work. Here is the bugfix. Signed-off-by: Dmitry Poletaev <poletaev-qemu@yandex.ru> Reported-by: Kirill Batuzov <batuzovk@ispras.ru> Message-Id: <2692911436348920@web2m.yandex.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-07-15target-i386: emulate CPUID level of real hardwareRadim Krčmář1-19/+18
W10 insider has a bug where it ignores CPUID level and interprets CPUID.(EAX=07H, ECX=0H) incorrectly, because CPUID in fact returned CPUID.(EAX=04H, ECX=0H); this resulted in execution of unsupported instructions. While it's a Windows bug, there is no reason to emulate incorrect level. I used http://instlatx64.atw.hu/ as a source of CPUID and checked that it matches Penryn Xeon X5472, Westmere Xeon W3520, SandyBridge i5-2540M, and Haswell i5-4670T. kvm64 and qemu64 were bumped to 0xD to allow all available features for them (and to avoid the same Windows bug). Signed-off-by: Radim Krčmář <rkrcmar@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-07-15target-i386: Don't strdup() alias property nameEduardo Habkost1-1/+1
Now object_property_add_alias() calls g_strdup() on the target property name, so we don't need to call g_strdup() ourselves. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-07-09cpu-exec: Purge all uses of ENV_GET_CPU()Peter Crosthwaite1-1/+1
Remove un-needed usages of ENV_GET_CPU() by converting the APIs to use CPUState pointers and retrieving the env_ptr as minimally needed. Scripted conversion for target-* change: for I in target-*/cpu.h; do sed -i \ 's/\(^int cpu_[^_]*_exec(\)[^ ][^ ]* \*s);$/\1CPUState *cpu);/' \ $I; done Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-07-09cpu: Change cpu_exec_init() arg to cpu, not envPeter Crosthwaite1-1/+1
The callers (most of them in target-foo/cpu.c) to this function all have the cpu pointer handy. Just pass it to avoid an ENV_GET_CPU() from core code (in exec.c). Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Richard Henderson <rth@twiddle.net> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> Cc: Eduardo Habkost <ehabkost@redhat.com> Cc: Michael Walle <michael@walle.cc> Cc: Leon Alrae <leon.alrae@imgtec.com> Cc: Anthony Green <green@moxielogic.com> Cc: Jia Liu <proljc@gmail.com> Cc: Alexander Graf <agraf@suse.de> Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Cc: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-07-09translate-all: Change tb_flush() env argument to cpuPeter Crosthwaite1-1/+1
All of the core-code usages of this API have the cpu pointer handy so pass it in. There are only 3 architecture specific usages (2 of which are commented out) which can just use ENV_GET_CPU() locally to get the cpu pointer. The reduces core code usage of the CPU env, which brings us closer to common-obj'ing these core files. Cc: Riku Voipio <riku.voipio@iki.fi> Cc: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Acked-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-07-09cpu: Add Error argument to cpu_exec_init()Bharata B Rao1-1/+1
Add an Error argument to cpu_exec_init() to let users collect the error. This is in preparation to change the CPU enumeration logic in cpu_exec_init(). With the new enumeration logic, cpu_exec_init() can fail if cpu_index values corresponding to max_cpus have already been handed out. Since all current callers of cpu_exec_init() are from instance_init, use error_abort Error argument to abort in case of an error. Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-07-08Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2-2/+1
Bugfixes and Daniel Berrange's crypto library. # gpg: Signature made Wed Jul 8 12:12:29 2015 BST using RSA key ID 78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: ossaudio: fix memory leak ui: convert VNC to use generic cipher API block: convert qcow/qcow2 to use generic cipher API ui: convert VNC websockets to use crypto APIs block: convert quorum blockdrv to use crypto APIs crypto: add a nettle cipher implementation crypto: add a gcrypt cipher implementation crypto: introduce generic cipher API & built-in implementation crypto: move built-in D3DES implementation into crypto/ crypto: move built-in AES implementation into crypto/ crypto: introduce new module for computing hash digests vl: move rom_load_all after machine init done Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-07-07target-i386: avoid overflow in the tsc-frequency propertyPaolo Bonzini1-1/+1
The TSC frequency fits comfortably in an int when expressed in kHz, but it may overflow when converted to Hz. In this case, tsc-frequency returns a negative value because x86_cpuid_get_tsc_freq does a 32-bit multiplication before assigning to int64_t. For simplicity just make tsc_khz a 64-bit value. Spotted by Coverity. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-07-07i386: Introduce ARAT CPU featureJan Kiszka3-1/+37
ARAT signals that the APIC timer does not stop in power saving states. As our APICs are emulated, it's fine to expose this feature to guests, at least when asking for KVM host features or with CPU types that include the flag. The exact model number that introduced the feature is not known, but reports can be found that it's at least available since Sandy Bridge. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-07-07crypto: move built-in AES implementation into crypto/Daniel P. Berrange2-2/+1
To prepare for a generic internal cipher API, move the built-in AES implementation into the crypto/ directory Signed-off-by: Daniel P. Berrange <berrange@redhat.com> Message-Id: <1435770638-25715-3-git-send-email-berrange@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-07-06pc: add SMM propertyPaolo Bonzini3-0/+11
The property can take values on, off or auto. The default is "off" for KVM and pre-2.4 machines, otherwise "auto" (which makes it available on TCG or on new-enough kernels). Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-07-06target-i386: register a separate KVM address space including SMRAM regionsPaolo Bonzini1-1/+40
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-07-06target-i386: add support for SMBASE MSR and SMIsPaolo Bonzini2-12/+94
Apart from the MSR, the smi field of struct kvm_vcpu_events has to be translated into the corresponding CPUX86State fields. Also, memory transaction flags depend on SMM state, so pull it from struct kvm_run on every exit from KVM to userspace. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-07-01kvm: First step to push iothread lock out of inner run loopJan Kiszka1-0/+24
This opens the path to get rid of the iothread lock on vmexits in KVM mode. On x86, the in-kernel irqchips has to be used because we otherwise need to synchronize APIC and other per-cpu state accesses that could be changed concurrently. Regarding pre/post-run callbacks, s390x and ARM should be fine without specific locking as the callbacks are empty. MIPS and POWER require locking for the pre-run callback. For the handle_exit callback, it is non-empty in x86, POWER and s390. Some POWER cases could do without the locking, but it is left in place for now. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <1434646046-27150-7-git-send-email-pbonzini@redhat.com>
2015-06-22Include qapi/qmp/qerror.h exactly where neededMarkus Armbruster1-1/+0
In particular, don't include it into headers. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Luiz Capitulino <lcapitulino@redhat.com>
2015-06-22qerror: Move #include out of qerror.hMarkus Armbruster1-0/+1
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Luiz Capitulino <lcapitulino@redhat.com>
2015-06-22qerror: Clean up QERR_ macros to expand into a single stringMarkus Armbruster1-10/+9
These macros expand into error class enumeration constant, comma, string. Unclean. Has been that way since commit 13f59ae. The error class is always ERROR_CLASS_GENERIC_ERROR since the previous commit. Clean up as follows: * Prepend every use of a QERR_ macro by ERROR_CLASS_GENERIC_ERROR, and delete it from the QERR_ macro. No change after preprocessing. * Rewrite error_set(ERROR_CLASS_GENERIC_ERROR, ...) into error_setg(...). Again, no change after preprocessing. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Luiz Capitulino <lcapitulino@redhat.com>
2015-06-22disas: Remove uses of CPU envPeter Crosthwaite1-1/+1
disas does not need to access the CPU env for any reason. Change the APIs to accept CPU pointers instead. Small change pattern needs to be applied to all target translate.c. This brings us closer to making disas.o a common-obj and less architecture specific in general. Cc: Richard Henderson <rth@twiddle.net> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Eduardo Habkost <ehabkost@redhat.com> Cc: Michael Walle <michael@walle.cc> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Leon Alrae <leon.alrae@imgtec.com> Cc: Jia Liu <proljc@gmail.com> Cc: Alexander Graf <agraf@suse.de> Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Cc: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Acked-by: Luiz Capitulino <lcapitulino@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2015-06-12migration: Use normal VMStateDescriptions for SubsectionsJuan Quintela1-49/+32
We create optional sections with this patch. But we already have optional subsections. Instead of having two mechanism that do the same, we can just generalize it. For subsections we just change: - Add a needed function to VMStateDescription - Remove VMStateSubsection (after removal of the needed function it is just a VMStateDescription) - Adjust the whole tree, moving the needed function to the corresponding VMStateDescription Signed-off-by: Juan Quintela <quintela@redhat.com>
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