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2009-08-27set CPUID bits to present cores and threads topologyAndre Przywara1-3/+25
Controlled by the enhanced -smp option set the CPUID bits to present the guest the desired topology. This is vendor specific, but (with the exception of the CMP_LEGACY bit) not conflicting, so we set all bits everytime. There is no real multithreading support for AMD CPUs, so report cores instead. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-08-27push CPUID level to 4 to allow Intel multicore decodingAndre Przywara1-2/+2
Intel CPUs store the number of cores in CPUID leaf 4. So push the maxleaf value to 4 to allow the guests access to this leaf. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-08-24cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signalNathan Froyd1-0/+1
handle_cpu_signal is very nearly copy-paste code for each target, with a few minor variations. This patch sets up appropriate defaults for a generic handle_cpu_signal and provides overrides for particular targets that did things differently. Fixing things like the persistent (XXX: use sigsetjmp) should now become somewhat easier. Previous comments on this patch suggest that the "activate soft MMU for this block" comments refer to defunct functionality. I have removed such blocks for the appropriate targets in this patch. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-08-24Unbreak large mem support by removing kqemuAnthony Liguori4-72/+0
kqemu introduces a number of restrictions on the i386 target. The worst is that it prevents large memory from working in the default build. Furthermore, kqemu is fundamentally flawed in a number of ways. It relies on the TSC as a time source which will not be reliable on a multiple processor system in userspace. Since most modern processors are multicore, this severely limits the utility of kqemu. kvm is a viable alternative for people looking to accelerate qemu and has the benefit of being supported by the upstream Linux kernel. If someone can implement work arounds to remove the restrictions introduced by kqemu, I'm happy to avoid and/or revert this patch. N.B. kqemu will still function in the 0.11 series but this patch removes it from the 0.12 series. Paul, please Ack or Nack this patch. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-27rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIANJuan Quintela3-4/+4
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16Only allow -cpu host when KVM is enabledAnthony Liguori1-4/+3
-cpu host is not at all useful when using tcg. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16Initialize cpuid variablesAnthony Liguori1-1/+1
This causes a build break when !KVM. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16omit 3DNOW! CPUID bits from qemu64 CPU modelAndre Przywara1-2/+1
Since we recently do not disable 3DNOW! support anymore, we should avoid setting the bits in the default qemu64 CPU model to ease migration. TCG does not support it anyway and even AMD deprecates it's usage nowadays. If you want to use it in KVM, use the phenom, athlon or host CPU model. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-16Update to a hopefully more future proof FSF addressBlue Swirl8-16/+8
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-16gdbstub: x86: Support for setting segment registersJan Kiszka2-0/+34
This allows to set segment registers via gdb also in system emulation mode. Basic sanity checks are applied and nothing is changed if they fail. But screwing up the target via this interface will never be complicated, so I avoided being too paranoid here. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-10kvm: Work around borken MSR_GET_INDEX_LISTJan Kiszka1-2/+5
Allocate enough memory for KVM_GET_MSR_INDEX_LIST as older kernels shot far beyond their limits, corrupting user space memory. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-10Make sure to mark MCE defines as ULLAnthony Liguori1-4/+4
Fixes build on 32-bit Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-09QEMU: MCE: Add MCE simulation to qemu/tcgHuang Ying4-2/+155
- MCE features are initialized when VCPU is intialized according to CPUID. - A monitor command "mce" is added to inject a MCE. - A new interrupt mask: CPU_INTERRUPT_MCE is added to inject the MCE. aliguori: fix build for linux-user Signed-off-by: Huang Ying <ying.huang@intel.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-02Use ctz64 in favor of ffsllJan Kiszka1-3/+4
Not all host platforms support ffsll. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2009-07-01Suppress a GCC warningBlue Swirl1-1/+1
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-06-29KVM: x86: Refactor persistent CPU stateJan Kiszka1-7/+23
This patch aligns the KVM-related layout and encoding of the CPU state to be saved to disk or migrated with qemu-kvm. The major differences are reordering of fields and a compressed interrupt_bitmap into a single number as there can be no more than one pending IRQ at a time. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-06-29preserve the hypervisor bit while KVM trims the CPUID bitsAndre Przywara2-0/+5
The KVM kernel will disable all bits in CPUID which are not present in the host. As this is mostly true for the hypervisor bit (1.ecx), preserve its value before the trim and restore it afterwards. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-06-29remove CPUID host hacksAndre Przywara1-22/+5
KVM provides an in-kernel feature to disable CPUID bits that are not present in the current host. So there is no need here to duplicate this work. Additionally allows 3DNow! on capable processors, since the restriction seems to apply to QEMU/TCG only. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-06-29fix KVMs GET_SUPPORTED_CPUID feature usageAndre Przywara2-29/+22
If we want to trim the user provided CPUID bits for KVM to be not greater than that of the host, we should not remove the bits _after_ we sent them to the kernel. This fixes the masking of features that are not present on the host by moving the trim function and it's call from helper.c to kvm.c. It helps to use -cpu host. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-06-29CPUID Fn8000_0001.EAX is family/model/stepping, not featuresAndre Przywara1-1/+1
Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-06-29introduce -cpu host targetAndre Przywara1-6/+59
Although the guest's CPUID bits can be controlled in a fine grained way in QEMU, a simple way to inject the host CPU is missing. This is handy for KVM desktop virtualization, where one wants the guest to support the full host feature set. Introduce another CPU type called 'host', which will propagate the host's CPUID bits to the guest. Unwanted bits can still be turned off by using the existing syntax (-cpu host,-skinit) Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-06-29allow hypervisor CPUID bit to be overridenAndre Przywara1-12/+11
KVM defaults to the hypervisor CPUID bit to be set, whereas pure QEMU clears it. On some occasions one wants to set or clear it the other way round (for instance to get HyperV running inside a guest). Move the bit-set to be done before the command line parsing and enable it by default. One can disable it by using: -cpu qemu64,-hypervisor Fix some whitespace damage on the way. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-06-22Handle init/sipi in a main cpu exec loop. (v2)Gleb Natapov3-0/+28
This should fix compilation problem in case of CONFIG_USER_ONLY. Currently INIT/SIPI is handled in the context of CPU that sends IPI. This patch changes this to handle them like all other events in a main cpu exec loop. When KVM will gain thread per vcpu capability it will be much more clear to handle those event by cpu thread itself and not modify one cpu's state from the context of the other. Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-06-16QEMU KVM: i386: Fix the cpu reset stateNitin A Kamble1-6/+12
As per the IA32 processor manual, the accessed bit is set to 1 in the processor state after reset. qemu pc cpu_reset code was missing this accessed bit setting. Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-06-16allow CPUID vendor overrideAndre Przywara2-1/+5
KVM-enabled QEMU will always report the vendor ID of the physical CPU it is running on. Allow to override this if explicitly requested on the command line. It will not suffice to name a CPU type (like -cpu phenom), but you have to explicitly set the vendor: -cpu phenom,vendor=AuthenticAMD Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-05-22x86: Add support for resume flagJan Kiszka4-4/+17
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2009-05-22kvm: x86: Save/restore KVM-specific CPU statesJan Kiszka3-3/+26
Save and restore all so far neglected KVM-specific CPU states. Handling the TSC stabilizes migration in KVM mode. The interrupt_bitmap and mp_state are currently unused, but will become relevant for in-kernel irqchip support. By including proper saving/restoring already, we avoid having to increment CPU_SAVE_VERSION later on once again. v2: - initialize mp_state runnable (for the boot CPU) Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-05-22kvm: Add missing bits to support live migrationJan Kiszka1-0/+4
This patch adds the missing hooks to allow live migration in KVM mode. It adds proper synchronization before/after saving/restoring the VCPU states (note: PPC is untested), hooks into cpu_physical_memory_set_dirty_tracking() to enable dirty memory logging at KVM level, and synchronizes that drity log into QEMU's view before running ram_live_save(). Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-05-21Convert machine registration to use module init functionsAnthony Liguori1-9/+0
This cleans up quite a lot of #ifdefs, extern variables, and other ugliness. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-05-20kvm: work around supported cpuid ioctl() brokennessMark McLoughlin1-0/+3
KVM_GET_SUPPORTED_CPUID has been known to fail to return -E2BIG when it runs out of entries. Detect this by always trying again with a bigger table if the ioctl() fills the table. Signed-off-by: Mark McLoughlin <markmc@redhat.com>
2009-05-13Include assert.h from qemu-common.hPaul Brook2-2/+0
Include assert.h from qemu-common.h and remove other direct uses. cpu-all.h still need to include it because of the dyngen-exec.h hacks Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-05-13Replace gcc variadic macro extension with C99 versionBlue Swirl2-4/+4
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-08Remove noisy printf when KVM masks CPU featuresAnthony Liguori1-1/+0
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-05-08kvm: Trim cpu features not supported by kvmAvi Kivity1-0/+30
Remove cpu features that are not supported by kvm from the cpuid features reported to the guest. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-05-08Fix x86 feature modifications for features that set multiple bitsAvi Kivity1-5/+8
QEMU allows adding or removing cpu features by using the syntax '-cpu +feature' or '-cpu -feature'. Some cpuid features cause more than one bit to be set or cleared; but QEMU stops after just one bit has been modified, causing the feature bits to be inconsistent. Fix by allowing all feature bits corresponding to a given name to be set. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-05-08Make x86 cpuid feature names available in file scopeAvi Kivity1-27/+28
To be used later. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-05-08kvm: Add support for querying supported cpu featuresAvi Kivity1-0/+80
kvm does not support all cpu features; add support for dunamically querying the supported feature set. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-04-24qemu: introduce qemu_init_vcpu (Marcelo Tosatti)aliguori1-2/+3
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7242 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-24qemu: per-arch cpu_has_work (Marcelo Tosatti)aliguori1-3/+12
Blue Swirl: fix Sparc32 breakage Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7238 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-23Fix i386-linux-user build (Laurent Desnogues)aliguori1-0/+8
This broke due to r7230. Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7233 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-22put valid data into exit_int_info if needed (Gleb Natapov)aliguori1-27/+52
If fault happened during event delivery exit_int_info should contain valid info about the event on vm exit. Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7230 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-22xen: groundwork for xen support (Gerd Hoffmann)aliguori1-0/+3
- configure script and build system changes. - wind up new machine type. - add -xen-* command line options. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7219 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-19kqemu: merge CONFIG_KQEMU and USE_KQEMUblueswir13-12/+12
Basically a recursive ":%s/USE_KQEMU/CONFIG_KQEMU/g". Signed-off-by: Paul Bolle <pebolle@tiscali.nl> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7189 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-18x86: Enhanced dump of segment registers (Jan Kiszka)aliguori2-39/+64
Parse the descriptor flags that segment registers refer to and show the result in a more human-friendly format. The output of info registers eg. then looks like this: [...] ES =007b 00000000 ffffffff 00cff300 DPL=3 DS [-WA] CS =0060 00000000 ffffffff 00c09b00 DPL=0 CS32 [-RA] SS =0068 00000000 ffffffff 00c09300 DPL=0 DS [-WA] DS =007b 00000000 ffffffff 00cff300 DPL=3 DS [-WA] FS =0000 00000000 00000000 00000000 GS =0033 b7dd66c0 ffffffff b7dff3dd DPL=3 DS [-WA] LDT=0000 00000000 00000000 00008200 DPL=0 LDT TR =0080 c06da700 0000206b 00008900 DPL=0 TSS32-avl [...] Changes in this version: - refactoring so that only a single helper is used for dumping the segment descriptor cache - tiny typo fixed that broke 64-bit segment type names Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7179 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-17kvm: Fix cpuid initialization (Jan Kiszka)aliguori1-40/+20
Fix (more or less) spurious guest boot failures due to corrupted cpuid states. The reason was insufficient initialization of cpuid entries before passing them to the kernel. At this chance also fix improper entry pointer progression and simplify the code a bit. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7167 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-05Add new command line option -singlestep for tcg single stepping.aurel321-0/+5
This replaces a compile time option for some targets and adds this feature to targets which did not have a compile time option. Add monitor command to enable or disable single step mode. Modify monitor command "info status" to display single step mode. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7004 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-02Immediate versions of ro[lr]malc1-1/+83
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6968 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-28kvm: Drop kvm_patch_opcode_byte (Jan Kiszka)aliguori1-23/+4
As cpu_memory_rw_debug is now capable of modifying ROM, we can drop our own patch function. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6906 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-20x86: Add NULL check to lsl (Jan Kiszka)aliguori1-0/+2
According to the Intel specs, lsl performs a check against NULL for the provided selector, just like lar does. helper_lar() includes the corresponding code, helper_lsl() was lacking it so far. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6863 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-13target-i386: use the new bswap* TCG opsaurel321-13/+3
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6836 c046a42c-6fe2-441c-8c8c-71466251a162
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