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path: root/target-mips/exec.h
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2009-04-24qemu: per-arch cpu_has_work (Marcelo Tosatti)aliguori1-2/+8
2009-03-08target-mips: rename helpers from do_ to helper_aurel321-2/+0
2008-12-20Fix remaining compiler warnings for mips targets.ths1-15/+0
2008-11-30Common cpu_loop_exit prototypeaurel321-1/+0
2008-11-11target-mips: optimize gen_op_addr_add() (2/2)aurel321-1/+4
2008-09-18Move the active FPU registers into env again, and use more TCG registersths1-1/+1
2008-09-14MIPS: remove empty cpu_mips_irqctrl_init()aurel321-1/+0
2008-08-30Fix some warnings that would be generated by gcc -Wredundant-declsblueswir11-3/+0
2008-07-23Use plain standard inline.ths1-4/+4
2008-07-09Use temporary registers for the MIPS FPU emulation.ths1-23/+0
2008-06-24Remove remaining uses of T0 in the MIPS target.ths1-6/+0
2008-06-24T1 is now dead.ths1-2/+0
2008-06-23Pass T0/T1 explicitly to helper functions, and clean up a few dyngenths1-1/+0
2008-06-20Delete obsolete prototypes.ths1-21/+0
2008-06-12Switch the standard multiplication instructions to TCG.ths1-2/+0
2008-06-12TCGify a few more instructions.ths1-1/+0
2008-06-11Call most FP helpers without deroute through op.cths1-73/+0
2008-06-11Move FP TNs to cpu env.ths1-18/+18
2008-06-09Switch remaining CP0 instructions to TCG or helper functions.ths1-34/+1
2008-05-18Switch most MIPS logical and arithmetic instructions to TCG.ths1-2/+0
2008-05-07Delete redundant prototype.ths1-2/+0
2008-05-06Use TCG for MIPS GPR moves.ths1-2/+2
2008-05-04Simplify mips branch handling. Retire T2 from use. Use TCG for branches.ths1-4/+2
2008-01-09Fix typo which broke MIPS32R2 64-bit FPU support.ths1-1/+1
2007-12-30MIPS COP1X (and related) instructions, by Richard Sandiford.ths1-2/+16
2007-12-25Support for VR5432, and some of its special instructions. Original patchths1-0/+14
2007-11-09Use FORCE_RET, scrap RETURN which was implemented in target-specific code.ths1-6/+0
2007-11-08Clean out the N32 macros from target-mips, and introduce MIPS ABI specificths1-3/+3
2007-10-28Implement missing MIPS supervisor mode bits.ths1-8/+4
2007-10-27Add sharable clz/clo inline functions and use them for the mips target.ths1-0/+2
2007-10-14Replace is_user variable with mmu_idx in softmmu core,j_mayer1-1/+1
2007-10-09Use always_inline in the MIPS support where applicable.ths1-4/+4
2007-10-09Fix [ls][wd][lr] instructions, by Aurelien Jarno.ths1-30/+0
2007-09-30Code provision for n32/n64 mips userland emulation. Not functional yet.ths1-5/+5
2007-09-29Supervisor mode implementation, by Aurelien Jarno.ths1-4/+9
2007-09-26hflags computation cleanup, by Aurelien Jarno.ths1-1/+25
2007-09-25Timer start/stop implementation, by Aurelien Jarno.ths1-0/+2
2007-09-16find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths1-2/+2
2007-09-06Partial support for 34K multithreading, not functional yet.ths1-19/+20
2007-06-03Clean up of some target specifics in exec.c/cpu-exec.c.ths1-8/+19
2007-05-19More MIPS 64-bit FPU support.ths1-46/+50
2007-05-18- Move FPU exception handling into helper functions, since they are big.ths1-0/+71
2007-05-16More generic 64 bit multiplication support, by Aurelien Jarno.ths1-2/+0
2007-05-13MIPS TLB style selection at runtime, by Herve Poussineau.ths1-5/+1
2007-05-07MIPS 64-bit FPU support, plus some collateral bugfixes in theths1-0/+6
2007-04-29Kill broken host register definitions, thanks to Paul Brook and Herveths1-11/+4
2007-04-15Fix qemu SIGFPE caused by division-by-zero due to underflow.ths1-1/+6
2007-04-01Actually enable 64bit configuration.ths1-4/+4
2007-03-31Malta CBUS UART support.ths1-1/+1
2007-03-23Fix enough FPU/R2 support to get 24Kf going.ths1-0/+1