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path: root/target-mips/mips-defs.h
AgeCommit message (Expand)AuthorFilesLines
2014-02-10target-mips: add CPU definition for MIPS32R5Petar Jovanovic1-0/+8
2010-06-29MIPS: Initial support of fulong mini pc (CPU definition)Huacai Chen1-0/+4
2010-06-09target-mips: microMIPS ASE supportNathan Froyd1-0/+1
2010-03-13target-mips: update address space definitionsAurelien Jarno1-4/+4
2010-03-12Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.Richard Henderson1-0/+4
2009-05-19Hardware convenience libraryPaul Brook1-3/+0
2007-12-25Support for VR5432, and some of its special instructions. Original patchths1-5/+9
2007-12-02Larger physical address space for 32-bit MIPS.ths1-0/+3
2007-11-08Clean out the N32 macros from target-mips, and introduce MIPS ABI specificths1-1/+1
2007-10-23Use the standard ASE check for MIPS-3D and MT.ths1-0/+2
2007-09-30Code provision for n32/n64 mips userland emulation. Not functional yet.ths1-1/+1
2007-09-24Per-CPU instruction decoding implementation, by Aurelien Jarno.ths1-0/+35
2007-05-13MIPS TLB style selection at runtime, by Herve Poussineau.ths1-2/+0
2007-04-29Kill broken host register definitions, thanks to Paul Brook and Herveths1-2/+0
2007-04-19Update comment. We can't easily adhere to the architecture spec becauseths1-3/+3
2007-04-17Choose number of TLBs at runtime, by Herve Poussineau.ths1-1/+0
2007-04-11Throw RI for invalid MFMC0-class instructions. Introduce optionalths1-0/+5
2007-04-01Actually enable 64bit configuration.ths1-4/+1
2007-03-21Move mips CPU specific initialization to translate_init.c.ths1-37/+0
2007-03-18MIPS -cpu selection support, by Herve Poussineau.ths1-26/+0
2007-02-28MIPS FPU dynamic activation, part 1, by Herve Poussineau.ths1-9/+4
2006-12-21Preliminiary MIPS64 support, disabled by default due to performance impact.ths1-3/+10
2006-12-06Add MIPS32R2 instructions, and generally straighten out the instructionths1-16/+34
2006-12-06MIPS TLB performance improvements, by Daniel Jacobowitz.ths1-0/+1
2006-06-14mips config fixes (initial patch by Stefan Weil)bellard1-11/+14
2006-06-14MIPS FPU support (Marius Goeger)bellard1-3/+9
2005-07-02MIPS target (Jocelyn Mayer)bellard1-0/+58