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path: root/target-mips/op_helper.c
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2010-02-06target-mips: don't call cpu_loop_exit() from helper.cAurelien Jarno1-2/+16
In helper.c AREG0 may not correspond do env, so it's not possible to call cpu_loop_exit() here. Call it from op_helper.c instead. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13target-mips: change interrupt bits to be mips16-awareNathan Froyd1-3/+14
We need to stash the operating mode into the low bit of the error PC and restore it on return from interrupts. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-11-30target-mips: use physical address in lladdrAurelien Jarno1-0/+39
Currently the ll/sc instructions use the virtual address in both user and system mode. Use the physical address insteead in system mode. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-11-30target-mips: factorize load/store code in op_helper.cAurelien Jarno1-152/+100
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-11-22target-mips: make CP0_LLAddr register CPU dependentAurelien Jarno1-2/+9
Depending on the CPU, CP0_LLAddr is either read-only or read-write, and the returned value can be shifted by a variable amount of bits. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
2009-11-22target-mips: rename CP0_LLAddr into lladdrAurelien Jarno1-7/+7
The variable CP0_LLAddr represent the full lladdr, not the actual register value, which is only part of this value and depends on the CPU. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-11-14target-mips: fix indentationAurelien Jarno1-1/+1
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-01Revert "Get rid of _t suffix"Anthony Liguori1-4/+4
In the very least, a change like this requires discussion on the list. The naming convention is goofy and it causes a massive merge problem. Something like this _must_ be presented on the list first so people can provide input and cope with it. This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-01Get rid of _t suffixmalc1-4/+4
Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: malc <av1474@comtv.ru>
2009-09-21Add 'static' to please SparseBlue Swirl1-1/+1
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-16Update to a hopefully more future proof FSF addressBlue Swirl1-2/+1
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-04-15target-mips: variable names consistencyaurel321-364/+364
Use a consistent naming of arguments and TCG variables across the whole file, the same as in tcg/tcg-op.h: - arg1, arg2, ... for arguments - t0, t1, t2, ... for variables Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7106 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-28target-mips: implement FPU Flush-To-Zero modeaurel321-0/+5
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6914 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-08target-mips: remove dead codeaurel321-34/+0
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6774 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-08target-mips: rename helpers from do_ to helper_aurel321-270/+261
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6773 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-15global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)aliguori1-3/+3
These are references to 'loglevel' that aren't on a simple 'if (loglevel & X) qemu_log()' statement. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6340 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-15Convert references to logfile/loglevel to use qemu_log*() macrosaliguori1-33/+33
This is a large patch that changes all occurrences of logfile/loglevel global variables to use the new qemu_log*() macros. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6338 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-14target-mips: fix indentationaurel321-11/+11
Remove all tabs from target-mips/* Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6306 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-04Update FSF address in GPL/LGPL boilerplateaurel321-1/+1
The attached patch updates the FSF address in the GPL/LGPL boilerplate in most GPL/LGPLed files, and also in COPYING.LIB. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6162 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-20Fix remaining compiler warnings for mips targets.ths1-2/+4
Signed-off-by: Stefan Weil <weil@mail.berlios.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6111 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07MIPS: remove a few warningsaurel321-4/+4
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5944 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-17TCG variable type checking.pbrook1-0/+21
Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11target-mips: convert bit shuffle ops to TCGaurel321-19/+0
Bit shuffle operations can be written with very few TCG instructions (between 5 and 8), so it is worth converting them to TCG. This code also move all bit shuffle generation code to a separate function in order to have a cleaner exception code path, that is it doesn't store back the TCG register to the target register after the exception, as the TCG register doesn't exist anymore. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5679 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11target-mips: convert bitfield ops to TCGaurel321-25/+1
Bitfield operations can be written with very few TCG instructions (between 2 and 5), so it is worth converting them to TCG. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5678 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-11target-mips: fix mft* helpers/callaurel321-5/+5
This patch attempts to fix mft* helpers and the associated TCG calls. mft* helpers do not take a register in argument, however: - some helpers are called with an argument while they do not take one. - some helpers are declared with an argument they don't use. Acked-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5674 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-06Show size for unassigned accesses (Robert Reif)blueswir11-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5436 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-18Move the active FPU registers into env again, and use more TCG registersths1-261/+261
to access them. Signed-off-by: Thiemo Seufer <ths@networkno.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5252 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-14MIPS: Fix tlbwi/tlbwraurel321-3/+9
In CP0 Index register, bit 31 means 'Probe Failure', while lowest bits contain the TLB index. In tlbwi and tlbwr instructions, this Probe Failure bit must be ignored when reading the TLB index. Attached patch fixes it. (Hervé Poussineau) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5215 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-23Use plain standard inline.ths1-7/+7
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4929 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-23Less hardcoding of TARGET_USER_ONLY.ths1-93/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4928 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-09Use temporary registers for the MIPS FPU emulation.ths1-368/+612
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4861 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-29Remove unnecessary helper arguments, and fix some typos.ths1-5/+5
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4802 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-27Avoid unused input arguments which triggered tcg errors. Spotted byths1-16/+18
Stefan Weil. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4795 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-27More efficient target register / TC accesses.ths1-80/+188
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4794 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-24Remove remaining uses of T0 in the MIPS target.ths1-34/+35
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4788 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-24Use temporaries instead of fixed registers for some instructions.ths1-6/+6
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4784 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-23Pass T0/T1 explicitly to helper functions, and clean up a few dyngenths1-549/+514
leftovers. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4780 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-20Convert unaligned load/store to TCG.ths1-0/+337
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4759 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-20Convert vr54xx multiply instructions to TCG.ths1-3/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4756 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-19Convert remaining MIPS FP instructions to TCG.ths1-0/+87
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4753 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-12Switch the standard multiplication instructions to TCG.ths1-10/+12
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4740 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-12Switch bitfield instructions and assorted special ops to TCG.ths1-0/+123
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4739 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-12TCGify a few more instructions.ths1-0/+6
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4736 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-09Switch remaining CP0 instructions to TCG or helper functions.ths1-4/+788
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4708 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25Fix off-by-one unwinding error.pbrook1-6/+0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4570 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-23Fix build failure for MIPS64 targets on 64-bit hosts.ths1-1/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4536 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21Switch MIPS clo/clz and the condition tests to TCG.ths1-0/+10
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4507 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-18Switch most MIPS logical and arithmetic instructions to TCG.ths1-50/+12
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4496 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-10fixed do_restore_state()bellard1-5/+7
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4413 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-12Make MIPS MT implementation more cache friendly.ths1-20/+20
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3981 c046a42c-6fe2-441c-8c8c-71466251a162
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