| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2008-05-07 | Be more economical with local temporaries. | ths | 1 | -2/+44 |
| 2008-05-06 | Convert some MIPS load/store instructions to TCG. | ths | 1 | -51/+175 |
| 2008-05-06 | Use TCG for MIPS GPR moves. | ths | 1 | -40/+78 |
| 2008-05-06 | Fix MIPS64 branches. Funny how this survived testing. | ths | 1 | -1/+1 |
| 2008-05-05 | Really really revert commit r4343 | aurel32 | 1 | -0/+4 |
| 2008-05-05 | Really revert commit r4343 | aurel32 | 1 | -2/+0 |
| 2008-05-05 | Don't stop translation for mtc0 compare | aurel32 | 1 | -2/+0 |
| 2008-05-04 | Simplify mips branch handling. Retire T2 from use. Use TCG for branches. | ths | 1 | -29/+48 |
| 2008-04-28 | Factorize code in translate.c | aurel32 | 1 | -0/+8 |
| 2008-04-11 | Remove osdep.c/qemu-img code duplication | aurel32 | 1 | -0/+1 |
| 2008-02-12 | Make MIPS MT implementation more cache friendly. | ths | 1 | -8/+8 |
| 2008-02-01 | use the TCG code generator | bellard | 1 | -37/+6 |
| 2007-12-30 | MIPS COP1X (and related) instructions, by Richard Sandiford. | ths | 1 | -9/+47 |
| 2007-12-25 | Support for VR5432, and some of its special instructions. Original patch | ths | 1 | -1/+100 |
| 2007-12-24 | Update debug code to match new accumulator register layout. | ths | 1 | -4/+4 |
| 2007-12-09 | Handle cpu_model in copy_cpu(), by Kirill A. Shutemov. | ths | 1 | -0/+1 |
| 2007-11-26 | Micro-optimize back-to-back store-load sequences. | ths | 1 | -103/+135 |
| 2007-11-22 | Optimize the conventional move operation. | ths | 1 | -0/+6 |
| 2007-11-18 | Fix MIPS64 R2 instructions. | ths | 1 | -6/+13 |
| 2007-11-10 | added cpu_model parameter to cpu_init() | bellard | 1 | -3/+10 |
| 2007-11-08 | Clean out the N32 macros from target-mips, and introduce MIPS ABI specific | ths | 1 | -27/+27 |
| 2007-11-08 | Formatting fix. | ths | 1 | -1/+1 |
| 2007-10-28 | Implement missing MIPS supervisor mode bits. | ths | 1 | -5/+7 |
| 2007-10-24 | Remove bogus instruction decode. | ths | 1 | -1/+0 |
| 2007-10-23 | Use the standard ASE check for MIPS-3D and MT. | ths | 1 | -92/+77 |
| 2007-10-23 | Switch bc1any* instructions off if no MIPS-3D is implemented. | ths | 1 | -1/+9 |
| 2007-10-09 | Use always_inline in the MIPS support where applicable. | ths | 1 | -17/+17 |
| 2007-10-09 | Fix [ls][wd][lr] instructions, by Aurelien Jarno. | ths | 1 | -4/+4 |
| 2007-09-30 | Code provision for n32/n64 mips userland emulation. Not functional yet. | ths | 1 | -27/+27 |
| 2007-09-26 | Wrap a few often used tests with unlikely(), by Aurelien Jarno. | ths | 1 | -6/+6 |
| 2007-09-25 | Optimise instructions accessing CP0, by Aurelien Jarno. | ths | 1 | -4/+16 |
| 2007-09-24 | Per-CPU instruction decoding implementation, by Aurelien Jarno. | ths | 1 | -86/+171 |
| 2007-09-20 | Extend TB flags to 64 bits (Alexander Graf). | j_mayer | 1 | -1/+1 |
| 2007-09-17 | find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the... | ths | 1 | -2/+2 |
| 2007-09-16 | find -type f | xargs sed -i 's/[\t ]$//g' # on most files | ths | 1 | -6/+6 |
| 2007-09-11 | Fix tb->size mishandling, by Daniel Jacobowitz. | ths | 1 | -5/+3 |
| 2007-09-06 | Partial support for 34K multithreading, not functional yet. | ths | 1 | -236/+713 |
| 2007-08-26 | Disable 64-bit instructions on 32-bit CPU, by Aurelien Jarno. | ths | 1 | -8/+8 |
| 2007-06-26 | Implement recip1/recip2/rsqrt1/rsqrt2. | ths | 1 | -3/+3 |
| 2007-06-02 | Check for R2 instructions, and throw RI if we don't emulate R2. | ths | 1 | -18/+50 |
| 2007-06-01 | Make sure hflags are updated for CP0_Status changes. | ths | 1 | -8/+42 |
| 2007-05-31 | Simplify code. | ths | 1 | -4/+4 |
| 2007-05-29 | Don't check the FPU state for each FPU instruction, use hflags to | ths | 1 | -84/+110 |
| 2007-05-28 | Handle PX/UX status flags correctly, by Aurelien Jarno. | ths | 1 | -7/+26 |
| 2007-05-28 | MIPS64 addressing fixes, by Aurelien Jarno. | ths | 1 | -9/+49 |
| 2007-05-23 | The 24k wants more watch and srsmap registers. | ths | 1 | -247/+31 |
| 2007-05-23 | The previous patch to make breakpoints work was a performance | ths | 1 | -22/+7 |
| 2007-05-20 | Catch more MIPS FPU cornercases, fix addr.ps and mulr.ps instructions. | ths | 1 | -8/+8 |
| 2007-05-20 | Fix indexed FP load/store instructions. | ths | 1 | -17/+28 |
| 2007-05-19 | More MIPS 64-bit FPU support. | ths | 1 | -37/+179 |
