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block-dmg-2.3-v2
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target-mips
Age
Commit message (
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Author
Files
Lines
2012-10-31
target-mips: simplify load/store microMIPS helpers
Aurelien Jarno
1
-64
/
+9
2012-10-31
target-mips: optimize load operations
Aurelien Jarno
1
-4
/
+12
2012-10-31
target-mips: cleanup load/store operations
Aurelien Jarno
1
-64
/
+35
2012-10-31
target-mips: restore CPU state after an FPU exception
Aurelien Jarno
1
-90
/
+95
2012-10-31
target-mips: use softfloat constants when possible
Aurelien Jarno
1
-48
/
+44
2012-10-31
target-mips: cleanup float to int conversion helpers
Aurelien Jarno
1
-39
/
+79
2012-10-31
target-mips: fix FPU exceptions
Aurelien Jarno
1
-13
/
+19
2012-10-31
target-mips: keep softfloat exception set to 0 between instructions
Aurelien Jarno
1
-63
/
+10
2012-10-31
target-mips: use the softfloat floatXX_muladd functions
Aurelien Jarno
3
-105
/
+64
2012-10-31
target-mips: do not save CPU state when using retranslation
Aurelien Jarno
1
-20
/
+0
2012-10-31
target-mips: correctly restore btarget upon exception
Aurelien Jarno
1
-0
/
+11
2012-10-31
target-mips: remove #if defined(TARGET_MIPS64) in opcode enums
Aurelien Jarno
1
-36
/
+0
2012-10-31
target-mips: Change TODO file
Jia Liu
1
-2
/
+1
2012-10-31
target-mips: Add ASE DSP processors
Jia Liu
1
-0
/
+52
2012-10-31
target-mips: Add ASE DSP accumulator instructions
Jia Liu
3
-0
/
+995
2012-10-31
target-mips: Add ASE DSP compare-pick instructions
Jia Liu
3
-0
/
+635
2012-10-31
target-mips: Add ASE DSP bit/manipulation instructions
Jia Liu
3
-0
/
+311
2012-10-31
target-mips: Add ASE DSP multiply instructions
Jia Liu
3
-0
/
+1499
2012-10-31
target-mips: Add ASE DSP GPR-based shift instructions
Jia Liu
3
-0
/
+618
2012-10-31
target-mips: Add ASE DSP arithmetic instructions
Jia Liu
3
-3
/
+1812
2012-10-31
target-mips: Add ASE DSP load instructions
Jia Liu
1
-0
/
+88
2012-10-31
target-mips: Add ASE DSP branch instructions
Jia Liu
1
-0
/
+36
2012-10-31
Use correct acc value to index cpu_HI/cpu_LO rather than using a fix number
Jia Liu
1
-27
/
+95
2012-10-31
target-mips: Add ASE DSP resources access check
Jia Liu
3
-2
/
+47
2012-10-31
target-mips: Add ASE DSP internal functions
Jia Liu
2
-1
/
+1064
2012-10-28
target-mips: Use TCG registers for the FPU.
Richard Henderson
1
-42
/
+54
2012-10-28
target-mips: rename helper flags
Aurelien Jarno
1
-53
/
+53
2012-10-23
Rename target_phys_addr_t to hwaddr
Avi Kivity
3
-18
/
+18
2012-10-17
target-mips: Pass MIPSCPU to mips_vpe_sleep()
Andreas Färber
1
-3
/
+7
2012-10-17
target-mips: Pass MIPSCPU to mips_tc_sleep()
Andreas Färber
1
-3
/
+5
2012-10-17
target-mips: Pass MIPSCPU to mips_vpe_is_wfi()
Andreas Färber
1
-4
/
+8
2012-10-17
target-mips: Pass MIPSCPU to mips_tc_wake()
Andreas Färber
1
-3
/
+8
2012-10-17
target-mips: Clean up other_cpu in helper_{d,e}vpe()
Andreas Färber
1
-14
/
+14
2012-09-27
Emit debug_insn for CPU_LOG_TB_OP_OPT as well.
Richard Henderson
1
-1
/
+2
2012-09-19
target-mips: Implement Loongson Multimedia Instructions
Richard Henderson
4
-4
/
+1180
2012-09-19
target-mips: Always evaluate debugging macro arguments
Richard Henderson
1
-14
/
+17
2012-09-19
target-mips: Fix MIPS_DEBUG.
Richard Henderson
1
-36
/
+38
2012-09-19
target-mips: Set opn in gen_ldst_multiple.
Richard Henderson
1
-0
/
+6
2012-09-15
target-mips: switch to AREG0 free mode
Blue Swirl
5
-1085
/
+1162
2012-09-08
MIPS/user: Fix reset CPU state initialization
Maciej W. Rozycki
3
-62
/
+52
2012-08-27
target-mips: allow microMIPS SWP and SDP to have RD equal to BASE
Eric Johnson
1
-1
/
+9
2012-08-27
target-mips: add privilege level check to several Cop0 instructions
Eric Johnson
1
-0
/
+9
2012-08-27
mips-linux-user: Always support rdhwr.
Richard Henderson
1
-0
/
+4
2012-08-27
target-mips: Streamline indexed cp1 memory addressing.
Richard Henderson
1
-2
/
+1
2012-08-27
Fix order of CVT.PS.S operands
Richard Sandiford
1
-1
/
+1
2012-08-27
Fix operands of RECIP2.S and RECIP2.PS
Richard Sandiford
1
-2
/
+2
2012-08-24
target-mips: Fix some helper functions (VR54xx multiplication)
Stefan Weil
1
-46
/
+29
2012-08-23
target-mips: Enable access to required RDHWR hardware registers
Meador Inge
1
-2
/
+3
2012-08-09
MIPS: Correct FCR0 initialization
Nathan Froyd
1
-0
/
+1
2012-06-07
build: move other target-*/ objects to nested Makefile.objs
Paolo Bonzini
1
-1
/
+2
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