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2008-03-29Fix infinite loop when invalidating TLB, by Herve Poussineau.ths1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4136 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-12Make MIPS MT implementation more cache friendly.ths5-59/+59
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3981 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-01use the TCG code generatorbellard2-55/+6
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3944 c046a42c-6fe2-441c-8c8c-71466251a162
2008-01-09Fix typo which broke MIPS32R2 64-bit FPU support.ths1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3902 c046a42c-6fe2-441c-8c8c-71466251a162
2008-01-08Fix broken absoluteness check for cabs.d.*.ths1-2/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3900 c046a42c-6fe2-441c-8c8c-71466251a162
2008-01-04Handle some more exception types.ths1-29/+43
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3886 c046a42c-6fe2-441c-8c8c-71466251a162
2008-01-03Fix exception debug output.ths1-39/+36
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3885 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-30MIPS COP1X (and related) instructions, by Richard Sandiford.ths3-18/+74
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3877 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-28Set FCR0.F64 for MIPS64R2-generic, by Richard Sandiford.ths1-3/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3865 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-26De-cruft exception definitions, and implement nicer debug output.ths2-26/+65
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3861 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-25Support for VR5432, and some of its special instructions. Original patchths6-7/+405
by Dirk Behme. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3859 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-255K and 20K are Release 1 CPUs.ths1-3/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3858 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-25Avoid host FPE for overflowing division on MIPS, by Richard Sandiford.ths1-3/+10
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3856 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-25Improved PABITS handling, and config register fixes.ths4-56/+106
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3855 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-24Update debug code to match new accumulator register layout.ths1-4/+4
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3853 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-24Fix CCRes value for 20Kc.ths1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3849 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-17MIPS TODO: mention unimplemented system controllers.ths1-0/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3830 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-17Update MIPS TODO. The mipsnet failure is caused by a kernel bug.ths1-6/+0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3829 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-09Handle cpu_model in copy_cpu(), by Kirill A. Shutemov.ths1-0/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3778 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-02Larger physical address space for 32-bit MIPS.ths1-0/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3765 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-26Micro-optimize back-to-back store-load sequences.ths1-103/+135
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3743 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-22Optimize the conventional move operation.ths1-0/+6
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3720 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-22Fix off-by-one address checks in MIPS64 MMU, by Aurelien Jarno.ths1-4/+4
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3718 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-19Add older 4Km variants.ths1-0/+34
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3708 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-18Add strict checking mode for softfp code.pbrook1-4/+4
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3688 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-18Fix MIPS64 R2 instructions.ths3-30/+34
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3686 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-18Use a valid PRid.ths1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3685 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17Fix int/float inconsistencies.pbrook3-36/+34
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3672 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-14Introduce 4KEm configuration with fixed MMU mapping. Delete bogus INSN_DSPths1-2/+19
flags. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3637 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-10added cpu_model parameter to cpu_init()bellard3-29/+23
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-09Use FORCE_RET, scrap RETURN which was implemented in target-specific code.ths5-424/+418
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3560 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-09Move kernel loader parameters from the cpu state to being board specific.ths1-5/+0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3557 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-08Clean out the N32 macros from target-mips, and introduce MIPS ABI specificths9-61/+61
defines for linux-user. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3556 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-08Formatting fix.ths1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3554 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-29Adjust s390 addresses (the MSB is defined as "to be ignored").ths1-1/+5
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3486 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-29Preliminary MIPS64R2 mode.ths1-0/+21
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3479 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-29Fix logic bug which broke TLBL/TLBS handling somewhat.ths1-3/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3478 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-29Restrict CP0_PerfCnt to legal values.ths1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3476 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-28Implement missing MIPS supervisor mode bits.ths6-35/+49
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3472 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-27Add sharable clz/clo inline functions and use them for the mips target.ths3-49/+33
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3455 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-26The other half of the mul64 rework. Sorry for the breakage, I committedths1-2/+2
an incomplete version of what I tested. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3454 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-24Remove bogus instruction decode.ths1-1/+0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3433 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-24Force proper sign extension for mfc0/mfhc0 on MIPS64.ths1-2/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3432 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-23Fix writable length of the index register.ths1-1/+8
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3431 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-23Enforce proper sign extension for lwl/lwr on MIPS64.ths1-1/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3430 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-23Fix CLO calculation for MIPS64. And a small code cleanup.ths1-5/+5
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3428 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-23Use the standard ASE check for MIPS-3D and MT.ths3-93/+80
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3427 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-23Switch bc1any* instructions off if no MIPS-3D is implemented.ths1-1/+9
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3426 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-20Handle IBE on MIPS properly.ths2-0/+11
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3416 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-17Update TODO.ths1-0/+6
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3402 c046a42c-6fe2-441c-8c8c-71466251a162
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