peter/qemu - QEMU hacking for Peter

Age	Commit message (Collapse)	Author	Files	Lines
2012-09-27	Emit debug_insn for CPU_LOG_TB_OP_OPT as well.	Richard Henderson	1	-1/+1
	For all targets that currently call tcg_gen_debug_insn_start, add CPU_LOG_TB_OP_OPT to the condition that gates it. This is useful for comparing optimization dumps, when the pre-optimization dump is merely noise. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-07-27	target-or32: Add linux user support	Jia Liu	1	-0/+12
	Add QEMU OpenRISC linux user support. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-27	target-or32: Add system instructions	Jia Liu	5	-1/+321
	Add OpenRISC system instructions. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-27	target-or32: Add timer support	Jia Liu	1	-0/+22
	Add OpenRISC timer support. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-27	target-or32: Add PIC support	Jia Liu	1	-0/+3
	Add OpenRISC Programmable Interrupt Controller support. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-27	target-or32: Add instruction translation	Jia Liu	1	-0/+1734
	Add OpenRISC instruction tanslation routines. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-27	target-or32: Add float instruction helpers	Jia Liu	3	-1/+335
	Add OpenRISC float instruction helpers. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-27	target-or32: Add int instruction helpers	Jia Liu	3	-1/+85
	Add OpenRISC int instruction helpers. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-27	target-or32: Add exception support	Jia Liu	5	-2/+89
	Add OpenRISC exception support. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-27	target-or32: Add interrupt support	Jia Liu	5	-2/+134
	Add OpenRISC interrupt support. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-27	target-or32: Add MMU support	Jia Liu	3	-2/+303
	Add OpenRISC MMU support. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-27	target-or32: Add target stubs and QOM cpu	Jia Liu	8	-0/+792
	Add OpenRISC target stubs, QOM cpu and basic machine. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>