summaryrefslogtreecommitdiff
path: root/target-ppc/cpu.h
AgeCommit message (Expand)AuthorFilesLines
2014-03-13exec: Change cpu_abort() argument to CPUStateAndreas Färber1-1/+1
2014-03-13cpu: Turn cpu_handle_mmu_fault() into a CPUClass hookAndreas Färber1-2/+2
2014-03-13cpu: Turn cpu_has_work() into a CPUClass hookAndreas Färber1-8/+0
2014-03-05target-ppc: add PowerPCCPU::cpu_dt_idAlexey Kardashevskiy1-0/+18
2014-03-05target-ppc: Fix htab_mask calculationAneesh Kumar K.V1-0/+1
2014-03-05target-ppc: Altivec 2.07: Update AVR StructureTom Musta1-0/+4
2014-03-05target-ppc: Altivec 2.07: Add Instruction FlagTom Musta1-1/+4
2014-03-05target-ppc: Add Load Quadword and ReserveTom Musta1-0/+1
2014-03-05target-ppc: Add Flag for ISA 2.07 Load/Store Quadword InstructionsTom Musta1-1/+3
2014-03-05target-ppc: Add Target Address SPR (TAR) to Power8Tom Musta1-0/+1
2014-03-05target-ppc: Add Flag for bctarTom Musta1-2/+4
2014-03-05target-ppc: Add Flag for Power ISA V2.06 Floating Point Test InstructionsTom Musta1-1/+3
2014-03-05target-ppc: Add Flag for ISA V2.06 Floating Point ConversionTom Musta1-1/+4
2014-03-05target-ppc: Add Flag for ISA2.06 Atomic InstructionsTom Musta1-1/+4
2014-03-05target-ppc: Add Flag for ISA2.06 Divide Extended InstructionsTom Musta1-1/+4
2014-03-05target-ppc: Add ISA2.06 bpermd InstructionTom Musta1-1/+3
2014-03-05target-ppc: VSX Stage 4: Add VSX 2.07 FlagTom Musta1-1/+3
2014-03-05target-ppc: fix SPR_CTRL/SPR_UCTRL register numbersAlexey Kardashevskiy1-2/+2
2014-03-05target-ppc: fix LPCR SPR numberAlexey Kardashevskiy1-1/+1
2013-12-20Add MSR VSX and Associated ExceptionTom Musta1-0/+4
2013-12-20Declare and Enable VSXTom Musta1-1/+4
2013-10-25target-ppc: Use #define for max slb entriesAneesh Kumar K.V1-1/+2
2013-09-02target-ppc: USE LPCR_ILE to control exception endian on POWER7Anton Blanchard1-0/+2
2013-07-29target-ppc: Convert ppc cpu savevm to VMStateDescriptionAlexey Kardashevskiy1-5/+3
2013-07-23cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb()Andreas Färber1-5/+0
2013-07-09linux-user: Move cpu_clone_regs() and cpu_set_tls() into linux-userPeter Maydell1-20/+0
2013-07-01target-ppc: Introduce unrealizefn for PowerPCCPUAndreas Färber1-1/+3
2013-05-06PPC: Add MMU type for 2.06 with AMR but no TB pagesAlexander Graf1-0/+3
2013-04-26target-ppc: add instruction flags for Book I 2.05Aurelien Jarno1-1/+3
2013-04-26target-ppc: Add more stubs for POWER7 PMU registersDavid Gibson1-0/+1
2013-04-26PPC: Remove env->hreset_excp_prefixFabien Chouteau1-1/+0
2013-03-22target-ppc: Move ppc tlb_fill implementation into mmu_helper.cDavid Gibson1-2/+0
2013-03-22target-ppc: Split user only code out of mmu_helper.cDavid Gibson1-1/+4
2013-03-22mmu-hash64: Implement Virtual Page Class Key ProtectionDavid Gibson1-2/+6
2013-03-22mmu-hash*: Add header file for definitionsDavid Gibson1-24/+0
2013-03-22target-ppc: mmu_ctx_t should not be a global typeDavid Gibson1-14/+0
2013-03-22target-ppc: Disentangle BAT code for 32-bit hash MMUsDavid Gibson1-2/+0
2013-03-22target-ppc: Don't share get_pteg_offset() between 32 and 64-bitDavid Gibson1-1/+0
2013-03-22target-ppc: Disentangle hash mmu helper functionsDavid Gibson1-3/+0
2013-03-22target-ppc: Disentangle get_physical_address() pathsDavid Gibson1-0/+2
2013-03-22target-ppc: Disentangle find_pte()David Gibson1-0/+2
2013-03-22target-ppc: Disentangle pte_check()David Gibson1-0/+2
2013-03-22target-ppc: Move SLB handling into a mmu-hash64.cDavid Gibson1-3/+0
2013-03-22target-ppc: Trivial cleanups in mmu_helper.cDavid Gibson1-3/+0
2013-03-22target-ppc: Remove vestigial PowerPC 620 supportDavid Gibson1-30/+0
2013-03-22PPC/GDB: handle read and write of fpscrFabien Chouteau1-0/+2
2013-03-12cpu: Replace do_interrupt() by CPUClass::do_interrupt methodAndreas Färber1-1/+0
2013-03-12cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber1-2/+3
2013-03-08target-ppc: Add mechanism for synchronizing SPRs with KVMDavid Gibson1-0/+6
2013-03-08target-ppc: Convert CPU definitionsAndreas Färber1-20/+0
generated by cgit v1.2.1 (git 2.18.0) at 2024-04-29 00:51:23 +0000