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path: root/target-ppc/excp_helper.c
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2014-03-13cputlb: Change tlb_flush() argument to CPUStateAndreas Färber1-2/+2
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13exec: Change cpu_abort() argument to CPUStateAndreas Färber1-24/+24
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13cpu-exec: Change cpu_loop_exit() argument to CPUStateAndreas Färber1-1/+1
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13cpu: Move exception_index field from CPU_COMMON to CPUStateAndreas Färber1-8/+11
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-02-11exec: Make ldl_*_phys input an AddressSpaceEdgar E. Iglesias1-1/+3
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2013-12-20Add MSR VSX and Associated ExceptionTom Musta1-0/+5
This patch adds support for the VSX bit of the PowerPC Machine State Register (MSR) as well as the corresponding VSX Unavailable exception. The VSX bit is added to the defined bits masks of the Power7 and Power8 CPU models. Signed-off-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-09-03cpu: Use QTAILQ for CPU listAndreas Färber1-1/+1
Introduce CPU_FOREACH(), CPU_FOREACH_SAFE() and CPU_NEXT() shorthand macros. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-09-02target-ppc: USE LPCR_ILE to control exception endian on POWER7Anton Blanchard1-0/+10
On POWER7, LPCR_ILE is used to control what endian guests take their exceptions in so use it instead of MSR_ILE. Signed-off-by: Anton Blanchard <anton@samba.org> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-09cpu: Make first_cpu and next_cpu CPUStateAndreas Färber1-3/+6
Move next_cpu from CPU_COMMON to CPUState. Move first_cpu variable to qom/cpu.h. gdbstub needs to use CPUState::env_ptr for now. cpu_copy() no longer needs to save and restore cpu_next. Acked-by: Paolo Bonzini <pbonzini@redhat.com> [AF: Rebased, simplified cpu_copy()] Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-03-12cpu: Replace do_interrupt() by CPUClass::do_interrupt methodAndreas Färber1-3/+7
This removes a global per-target function and thus takes us one step closer to compiling multiple targets into one executable. It will also allow to override the interrupt handling for certain CPU families. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-03-12cpu: Pass CPUState to cpu_interrupt()Andreas Färber1-1/+1
Move it to qom/cpu.h to avoid issues with include order. Change pc_acpi_smi_interrupt() opaque to X86CPU. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-03-12cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber1-7/+15
Both fields are used in VMState, thus need to be moved together. Explicitly zero them on reset since they were located before breakpoints. Pass PowerPCCPU to kvmppc_handle_halt(). Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-01-07PPC: Bring EPR support closer to realityAlexander Graf1-0/+4
We already used to support the external proxy facility of FSL MPICs, but only implemented it halfway correctly. This patch adds support for * dynamic enablement of the EPR facility * interrupt acknowledgement only when the interrupt is delivered This way the implementation now is closer to real hardware. Signed-off-by: Alexander Graf <agraf@suse.de>
2013-01-07ppc/booke: fix crit/mcheck/debug exceptionsScott Wood1-9/+22
Book E does not play games with certain bits of xSRR1 being MSR save bits and others being error status. xSRR1 is the old MSR, period. This was causing things like MSR[CE] to be lost, even in the saved version, as soon as you take an exception. rfci/rfdi/rfmci are fixed to pass the actual xSRR1 register contents, rather than the register number. Put FIXME comments on the hack that is "asrr0/1". The whole point of separate exception levels is so that you can, for example, take a machine check or debug interrupt without corrupting critical-level operations. The right xSRR0/1 set needs to be chosen based on CPU type flags. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-31target-ppc: Pass PowerPCCPU to cpu_ppc_hypercallAndreas Färber1-2/+2
Adapt emulate_spapr_hypercall() accordingly. Needed for changing spapr_hypercall() argument type to PowerPCCPU. Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-10-31target-ppc: Pass PowerPCCPU to powerpc_excp()Andreas Färber1-16/+20
Needed for changing cpu_ppc_hypercall() argument type to PowerPCCPU. Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-06-24PPC: Add support for MSR_CMAlexander Graf1-4/+5
The BookE variant of MSR_SF is MSR_CM. Implement everything it takes in TCG to support running 64bit code with MSR_CM set. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Move load and store helpers, switch to AREG0 free modeBlue Swirl1-1/+2
Add an explicit CPUPPCState parameter instead of relying on AREG0 and rename op_helper.c (which only contains load and store helpers) to mem_helper.c. Remove AREG0 swapping in tlb_fill(). Switch to AREG0 free mode. Use cpu_ld{l,uw}_code in translation and interrupt handling, cpu_{ld,st}{l,uw}_data in loads and stores. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Move exception helpers from helper.c to excp_helper.cBlue Swirl1-0/+745
Move exception helpers from helper.c to excp_helper.c and make cpu_dump_rfi() static. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Avoid AREG0 for exception helpersBlue Swirl1-28/+32
Add an explicit CPUPPCState parameter instead of relying on AREG0. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Split exception helpersBlue Swirl1-0/+218
Move exception helpers from op_helper.c to excp_helper.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
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