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path: root/target-ppc/helper.c
AgeCommit message (Expand)AuthorFilesLines
2007-10-07PowerPC target optimisations: make intensive use of always_inline.j_mayer1-21/+24
2007-10-07Add MSR bits signification per PowerPC implementation flags (to be continued).j_mayer1-16/+8
2007-10-05Full implementation of PowerPC 64 MMU, just missing support for 1 TBj_mayer1-43/+167
2007-10-05PowerPC hardware reset vector is now considered as part of the exception model.j_mayer1-5/+1
2007-10-03Enable PowerPC 64 MMU model and exceptions.j_mayer1-68/+71
2007-10-03Fix PowerPC initialisation and first reset:j_mayer1-1/+4
2007-10-03We never have to export ppc_set_irq.j_mayer1-0/+13
2007-10-01Fix reproductible crash: call cpu_loop_exit from micro-op, not from helper.cj_mayer1-12/+6
2007-10-01Handle all MMU models in switches, even if it's just to abort because of lackj_mayer1-7/+100
2007-10-01Avoid op helpers that would just call helpers for TLB & SLB management:j_mayer1-28/+90
2007-09-30Fix PowerPC TLB miss dump code.j_mayer1-2/+2
2007-09-30XER is to be treated as a 64 bits register on 64 bits implementations,j_mayer1-2/+2
2007-09-29Rework PowerPC exceptions model to make it more versatile:j_mayer1-465/+528
2007-09-26Great rework and cleanups to ease PowerPC implementations definitions.j_mayer1-126/+161
2007-09-21Avoid compilation warnings on 32 bits hosts.j_mayer1-1/+3
2007-09-21More PowerPC definitions, from POWER 2.04 specifications and misc sources.j_mayer1-0/+12
2007-09-21Make CPU hflags be a masked version of the PowerPC MSR.j_mayer1-3/+4
2007-09-19Code provision for PowerPC BookE MMU model support.j_mayer1-11/+68
2007-09-19Code provision for PowerPC 64 MMU model support.j_mayer1-65/+276
2007-09-17Coding style fixes in PowerPC related code (no functional change):j_mayer1-10/+16
2007-09-17find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the...ths1-3/+3
2007-09-16find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths1-8/+8
2007-07-12Fix crash in set registers in PPC gdb-stub, by Jason Wessel.ths1-4/+6
2007-04-24Improve PowerPC 405 MMU model / share more code for other embedded targetsj_mayer1-22/+74
2007-04-19No functional changes:j_mayer1-49/+65
2007-04-16PowerPC 4xx software driven TLB fixes + debug traces.j_mayer1-27/+111
2007-04-16Add reset callbacks for PowerPC CPU.j_mayer1-0/+78
2007-04-16Add bus model (or input pins) into PowerPC CPU flags.j_mayer1-0/+7
2007-04-16Fix a lot of debug traces for PowerPC emulation: use logfile instead of stdoutj_mayer1-14/+39
2007-04-14Fix miscellaneous display warnings for PowerPC & alpha targetsj_mayer1-5/+5
2007-04-09Implement embedded IRQ controller for PowerPC 6xx/740 & 750.j_mayer1-6/+10
2007-04-07cpu_get_phys_page_debug should return target_phys_addr_tj_mayer1-2/+2
2007-03-31Support for PowerPC BookE exception model.j_mayer1-49/+92
2007-03-31Merge PowerPC 405 MMU model.j_mayer1-17/+142
2007-03-31As embedded PowerPC TLB model is very different from PowerPC 6xx ones,j_mayer1-11/+9
2007-03-30New model for PowerPC CPU hardware interrupt events:j_mayer1-0/+83
2007-03-23Add missing PowerPC 64 instructionsj_mayer1-2/+3
2007-03-23Fix debug printf: we need different macros for target_ulong printsj_mayer1-46/+53
2007-03-17Make it safe to use 64 bits GPR and/or 64 bits host registers.j_mayer1-38/+71
2007-03-07Great PowerPC emulation code resynchronisation and improvments:j_mayer1-415/+674
2007-01-05PPC32 Trace Exception and Trap instruction, by Jason Wessel.ths1-2/+0
2005-11-26specialize the power save code for 7x0 CPUsbellard1-1/+14
2005-11-23halt state support for ppcbellard1-0/+5
2005-11-20removed unneeded codebellard1-11/+1
2005-10-30avoid using physical accesses in user emulationbellard1-9/+29
2005-07-04correct split between helper.c and op_helper.c - moved some uops to op_helper...bellard1-88/+15
2005-07-02simplified PowerPC exception handling (Jocelyn Mayer)bellard1-106/+396
2005-07-02preliminary patch to support more PowerPC CPUs (Jocelyn Mayer)bellard1-46/+361
2005-06-04MMU fix - temporary osi_call support - xec_bc mask fixbellard1-36/+35
2005-03-13fpu fixes (Jocelyn Mayer) - soft float supportbellard1-2/+1
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