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path: root/target-ppc/op.c
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2008-11-10target-ppc: convert most SPE integer instructions to TCGaurel321-162/+0
2008-11-01target-ppc: convert 405 MAC instructions to TCGaurel321-95/+0
2008-11-01target-ppc: convert arithmetic functions to TCGaurel321-398/+0
2008-10-27target-ppc: convert rotation instructions to TCGaurel321-56/+0
2008-10-21target-ppc: convert branch related instructions to TCGaurel321-160/+0
2008-10-21target-ppc: convert logical instructions to TCGaurel321-248/+0
2008-10-21target-ppc: convert crf related instructions to TCGaurel321-179/+0
2008-10-21target-ppc: Convert XER accesses to TCGaurel321-75/+39
2008-10-15PPC: convert SPE logical instructions to TCGaurel321-48/+0
2008-10-14PPC: convert effective address computation to TCGaurel321-6/+0
2008-10-01target-ppc: fix computation of XER.{CA, OV} in addme, subfmeaurel321-8/+0
2008-10-01target-ppc: fix mullw/mullwoaurel321-0/+4
2008-09-14ppc: Convert op_andi to TCGaurel321-27/+0
2008-09-14ppc: Convert ctr, lr moves to TCGaurel321-24/+0
2008-09-05ppc: Convert op_subf to TCGaurel321-7/+0
2008-09-05ppc: Convert op_add, op_addi to TCGaurel321-13/+0
2008-09-04ppc: replace op_set_FT0 with tcg_gen_movi_i64aurel321-10/+0
2008-09-04ppc: Convert nip moves to TCGaurel321-30/+0
2008-09-04ppc: Convert CRF moves to TCGaurel321-36/+0
2008-09-04ppc: Convert FPR moves to TCGaurel321-72/+0
2008-09-02[ppc] Convert op_moven_T2_T0 to TCGaurel321-7/+0
2008-09-02[ppc] Convert op_reset_T0, op_set_{T0, T1} to TCGaurel321-42/+0
2008-09-02[ppc] Convert op_move_{T1,T2}_T0 to TCGaurel321-12/+0
2008-08-24Revert commits 5082 and 5083aurel321-0/+87
2008-08-24PPC: Switch a few instructions to TCGaurel321-87/+0
2008-04-07Revert revisions r4168 and r4169. That's work in progress, not ready for trun...aurel321-7/+7
2008-04-07Always enable precise emulation when softfloat is usedaurel321-7/+7
2008-03-13Use float32/64 instead of float/doubleaurel321-58/+27
2008-02-01use the TCG code generatorbellard1-15/+0
2007-11-16Always make PowerPC hypervisor mode memory accesses and instructionsj_mayer1-4/+0
2007-11-12Allow use of SPE extension by all PowerPC targets,j_mayer1-2/+0
2007-11-12More PowerPC target -1 usage fixes (reservation address).j_mayer1-1/+1
2007-11-12Fix usage of the -1 constant in the PowerPC target code:j_mayer1-10/+10
2007-11-11Fix POWER abs & abso computation.j_mayer1-2/+2
2007-11-11Optimize PowerPC overflow flag computation in most useful cases.j_mayer1-48/+22
2007-11-04PowerPC 601 need specific callbacks for its BATs setup.j_mayer1-11/+8
2007-10-31Fix CR ops with complement, thanks to Julian Seward for testingj_mayer1-19/+6
2007-10-28Make Alpha and PowerPC targets use shared helpersj_mayer1-2/+3
2007-10-27Fix PowerPC FPSCR update and floating-point exception generationj_mayer1-13/+113
2007-10-25Use host-utils for PowerPC 64 64x64 bits multiplications.j_mayer1-2/+2
2007-10-25Gprof prooved the PowerPC emulation spent too much time in MSR load and storej_mayer1-18/+23
2007-10-14Generate micro-ops for PowerPC hypervisor mode.j_mayer1-0/+5
2007-10-07PowerPC target coding style fixes.j_mayer1-2/+0
2007-10-05Full implementation of PowerPC 64 MMU, just missing support for 1 TBj_mayer1-0/+14
2007-10-01Fix nasty sign-extensions when running 32 bits CPU in the 64 bits emulatorj_mayer1-10/+10
2007-10-01Fix reproductible crash: call cpu_loop_exit from micro-op, not from helper.cj_mayer1-2/+8
2007-10-01Handle all MMU models in switches, even if it's just to abort because of lackj_mayer1-1/+14
2007-10-01Avoid op helpers that would just call helpers for TLB & SLB management:j_mayer1-15/+20
2007-10-01Implement embedded PowerPC exceptions prefix and vectors registers.j_mayer1-0/+15
2007-09-30* Update OEA environment, following the PowerPC 2.04 specification:j_mayer1-1/+22