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path: root/target-ppc/translate.c
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2013-03-03gen-icount.h: Rename gen_icount_start/end to gen_tb_start/endPeter Maydell1-2/+2
2013-02-25target-ppc: Fix SUBFE carryRichard Henderson1-4/+5
2013-02-23target-ppc: Compute mullwo without branchesRichard Henderson1-28/+14
2013-02-23target-ppc: Compute arithmetic shift carry without branchesRichard Henderson1-40/+31
2013-02-23target-ppc: Implement neg in terms of subfRichard Henderson1-44/+19
2013-02-23target-ppc: Use add2 for carry generationRichard Henderson1-125/+69
2013-02-23target-ppc: Compute addition carry with setcondRichard Henderson1-26/+16
2013-02-23target-ppc: Compute addition overflow without branchesRichard Henderson1-33/+13
2013-02-23target-ppc: Use setcond in gen_op_cmpRichard Henderson1-23/+23
2013-02-23target-ppc: Split out SO, OV, CA fields from XERRichard Henderson1-73/+115
2013-02-23target-ppc: Use mul*2 in mulh* insnsRichard Henderson1-44/+38
2013-02-01target-ppc: Fix build for PPC_DEBUG_DISASAndreas Färber1-1/+1
2013-02-01PPC: Unify dcbzl code pathAlexander Graf1-21/+12
2012-12-19misc: move include files to include/qemu/Paolo Bonzini1-1/+1
2012-12-19exec: move include files to include/exec/Paolo Bonzini1-1/+1
2012-12-19build: kill libdis, move disassemblers to disas/Paolo Bonzini1-1/+1
2012-12-08TCG: Use gen_opc_instr_start from context instead of global variable.Evgeny Voevodin1-3/+3
2012-12-08TCG: Use gen_opc_icount from context instead of global variable.Evgeny Voevodin1-1/+1
2012-12-08TCG: Use gen_opc_pc from context instead of global variable.Evgeny Voevodin1-2/+2
2012-11-26PPC: Fix missing TRACE exceptionJulio Guerra1-1/+2
2012-11-17TCG: Use gen_opc_buf from context instead of global variable.Evgeny Voevodin1-3/+3
2012-11-17TCG: Use gen_opc_ptr from context instead of global variable.Evgeny Voevodin1-4/+5
2012-11-10disas: avoid using cpu_single_envBlue Swirl1-1/+1
2012-11-01target-ppc: Extend FPU state for newer POWER CPUsDavid Gibson1-11/+18
2012-09-27Emit debug_insn for CPU_LOG_TB_OP_OPT as well.Richard Henderson1-1/+2
2012-08-28target-ppc: fix altivec instructionsAurelien Jarno1-1/+1
2012-06-24target-ppc: Fix build with --enable-debugStefan Weil1-1/+1
2012-06-24PPC: Add support for MSR_CMAlexander Graf1-1/+1
2012-06-24ppc: Move load and store helpers, switch to AREG0 free modeBlue Swirl1-15/+15
2012-06-24ppc: Avoid AREG0 for misc helpersBlue Swirl1-1/+1
2012-06-24ppc: Avoid AREG0 for timebase helpersBlue Swirl1-6/+10
2012-06-24ppc: Avoid AREG0 for MMU etc. helpersBlue Swirl1-39/+46
2012-06-24ppc: Avoid AREG0 for integer and vector helpersBlue Swirl1-55/+119
2012-06-24ppc: Avoid AREG0 for FPU and SPE helpersBlue Swirl1-48/+65
2012-06-24ppc: Avoid AREG0 for exception helpersBlue Swirl1-19/+21
2012-04-15target-ppc: QOM'ify CPU resetAndreas Färber1-1/+1
2012-03-15PPC: KVM: Synchronize regs on CPU dumpAlexander Graf1-0/+2
2012-03-15PPC64: Add support for ldbrx and stdbrx instructionsThomas Huth1-9/+43
2012-03-14target-ppc: Don't overuse CPUStateAndreas Färber1-39/+39
2012-02-28target-ppc: Clean includesStefan Weil1-6/+0
2012-02-02PPC: E500: Implement msgsndAlexander Graf1-0/+16
2012-02-02PPC: E500: Implement msgclrAlexander Graf1-0/+18
2012-02-02PPC: booke206: Check for TLB overrunAlexander Graf1-0/+1
2012-02-02PPC: booke206: Implement tlbilxAlexander Graf1-0/+35
2012-02-02PPC: rename msync to msync_4xxAlexander Graf1-2/+2
2012-02-02PPC: e500: msync is 440 only, e500 has real syncAlexander Graf1-2/+1
2011-11-11PPC: Fix for the gdb single step problem on an rfi instructionSebastian Bauer1-1/+3
2011-10-30Set an invalid-bits mask for each SPE instructionsFabien Chouteau1-229/+271
2011-10-06Implement POWER7's CFAR in TCGDavid Gibson1-0/+28
2011-08-23PPC: E500: Inject SPE exception on invalid SPE accessAlexander Graf1-39/+39
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