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path: root/target-ppc/translate_init.c
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2013-03-22target-ppc: Use QOM method dispatch for MMU fault handlingDavid Gibson1-1/+53
After previous cleanups, the many scattered checks of env->mmu_model in the ppc MMU implementation have, at least for "classic" hash MMUs been reduced (almost) to a single switch at the top of cpu_ppc_handle_mmu_fault(). An explicit switch is still a pretty ugly way of handling this though. Now that Andreas Färber's CPU QOM cleanups for ppc have gone in, it's quite straightforward to instead make the handle_mmu_fault function a QOM method on the CPU object. This patch implements such a scheme, initializing the method pointer at the same time as the mmu_model variable. We need to keep the latter around for now, because of the MMU types (BookE, 4xx, et al) which haven't been converted to the new scheme yet, and also for a few other uses. It would be good to clean those up eventually. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-22mmu-hash64: Implement Virtual Page Class Key ProtectionDavid Gibson1-0/+49
Version 2.06 of the Power architecture describes an additional page protection mechanism. Each virtual page has a "class" (0-31) recorded in the PTE. The AMR register contains bits which can prohibit reads and/or writes on a class by class basis. Interestingly, the AMR is userspace readable and writable, however user mode writes are masked by the contents of the UAMOR which is privileged. This patch implements this protection mechanism, along with the AMR and UAMOR SPRs. The architecture also specifies a hypervisor-privileged AMOR register which masks user and supervisor writes to the AMR and UAMOR. We leave this out for now, since we don't at present model hypervisor mode correctly in any case. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> [agraf: fix 32-bit hosts] Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-22target-ppc: Remove vestigial PowerPC 620 supportDavid Gibson1-255/+0
The PowerPC 620 was the very first 64-bit PowerPC implementation, but hardly anyone ever actually used the chips. qemu notionally supports the 620, but since we don't actually have code to implement the segment table, the support is broken (quite likely in other ways too). This patch, therefore, removes all remaining pieces of 620 support, to stop it cluttering up the platforms we actually care about. This includes removing support for the ASR register, used only on segment table based machines. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-22PPC/GDB: handle read and write of fpscrFabien Chouteau1-1/+1
Although the support of this register may be uncomplete, there are no reason to prevent the debugger from reading or writing it. Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-12cpu: Replace do_interrupt() by CPUClass::do_interrupt methodAndreas Färber1-0/+1
This removes a global per-target function and thus takes us one step closer to compiling multiple targets into one executable. It will also allow to override the interrupt handling for certain CPU families. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-03-08target-ppc: Move CPU aliases out of translate_init.cAndreas Färber1-198/+3
Move array of CPU aliases to cpu-models.c, alongside model definitions. This requires to zero-terminate the aliases array since ARRAY_SIZE() can no longer be used in translate_init.c then. Suggested-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Report CPU aliases for QMPAndreas Färber1-0/+21
The QMP query-cpu-definitions implementation iterated over CPU classes only, which were getting less and less as aliases were extracted. Keep them in QMP as valid -cpu arguments even if not guaranteed stable. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: List alias names alongside CPU modelsAndreas Färber1-12/+11
Revert adding a separate -cpu ? output section for aliases and list them per CPU subclass. Requested-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Make host CPU a subclass of the host's CPU modelAndreas Färber1-7/+8
This avoids assigning individual class fields and contributors forgetting to add field assignments in KVM-only code. ppc_cpu_class_find_by_pvr() requires the CPU model classes to be registered, so defer host CPU type registration to kvm_arch_init(). Only register the host CPU type if there is a class with matching PVR. This lets us drop error handling from instance_init. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Fix PPC_DUMP_SPR_ACCESS buildAndreas Färber1-2/+2
A victim of the d523dd00a7d73b28f2e99acf45a4b3f92e56e40a AREG0 conversion, insert the missing cpu_env arguments. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Add mechanism for synchronizing SPRs with KVMDavid Gibson1-49/+65
Currently when runing under KVM on ppc, we synchronize a certain number of vital SPRs to KVM through the SET_SREGS call. This leaves out quite a lot of important SPRs which are maintained in KVM. It would be helpful to have their contents in qemu for debugging purposes, and when we implement migration it will be vital, since they include important guest state that will need to be restored on the target. This patch sets up for synchronization of any registers supported by the KVM ONE_REG calls. A new variant on spr_register() allows a ONE_REG id to be stored with the SPR information. When we set/get information to KVM we also synchronize any SPRs so registered. For now we set this mechanism up to synchronize a handful of important registers that already have ONE_REG IDs, notably the DAR and DSISR. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Change "POWER7" CPU aliasAndreas Färber1-1/+1
Let it resolve to v2.3 rather than v2.0. Suggested-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Split model definitions out of translate_init.cAndreas Färber1-1905/+2
Now that model definitions only reference their parent type, model definitions are independent of the family definitions and can be compiled independently of TCG translation. Keep all #if defined(TODO) code local to cpu-models.c. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Update Coding Style for CPU modelsAndreas Färber1-100/+100
Drop the space in #if defined (TODO). Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Turn descriptive CPU model comments into device descriptionsAndreas Färber1-860/+754
Fix microcontroller typo while at it. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Turn descriptive CPU family comments into device descriptionsAndreas Färber1-52/+107
This gets rid of some more overly long comments that have lost most of their purpose now that in most cases there's only two functions left per CPU family. The class field is inherited by the actual CPU models, so override it. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Set remaining fields on CPU family classesAndreas Färber1-430/+375
Now POWERPC_DEF_SVR() no longer sets family-specific fields itself. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Register all types for TARGET_PPCEMBAndreas Färber1-9/+34
Don't attempt to suppress registration of CPU types, since the criteria is actually a property of the class and should thus become a field. Since we can't check a field set in a class_init function before registering the type that leads to execution of that function, guard the -cpu class lookup instead and suppress exposing these classes in -cpu ? and in QMP. In case someone tries to hot-add an incompatible CPU via device_add, error out in realize. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Set instruction flags on CPU family classesAndreas Färber1-495/+499
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Introduce abstract CPU family typesAndreas Färber1-69/+432
Instead of assigning *_<family> constants, set .parent to a family type. Introduce a POWERPC_FAMILY() macro to keep type registration close to its implementation. This macro will need tweaking later. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Convert CPU definitionsAndreas Färber1-83/+80
Turn the array of model definitions into a set of self-registering QOM types with their own class_init. Unique identifiers are obtained from the combination of PVR, SVR and family identifiers; this requires all alias #defines to be removed from the list. Possibly there are some more left after this commit that are not currently being compiled. Prepares for introducing abstract intermediate CPU types for families. Keep the right-aligned macro line breaks within 78 chars to aid three-way merges. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Get model name from type nameAndreas Färber1-3/+10
We are about to drop the redundant name field along with ppc_def_t. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Extract POWER7 aliasAndreas Färber1-2/+1
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Extract 970 aliasesAndreas Färber1-6/+2
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Extract 405GPe aliasAndreas Färber1-3/+1
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Extract MPC8240 aliasAndreas Färber1-5/+3
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Extract MPC5200/MPC5200B aliasesAndreas Färber1-10/+2
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Extract MPC52xx aliasAndreas Färber1-5/+2
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Extract MPC82xx_HiP{3, 4} aliasesAndreas Färber1-42/+14
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Extract MPC82xx aliases to *_HiP4Andreas Färber1-18/+6
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Extract MPC8247/MPC8248/MPC8270-80 aliasesAndreas Färber1-21/+7
This depends on the fix for "G2leGP3" PVR. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Extract MPC82xx aliasAndreas Färber1-3/+1
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Extract e200 aliasAndreas Färber1-3/+1
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Extract e300 aliasAndreas Färber1-3/+1
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Extract MPC83xx aliasesAndreas Färber1-16/+4
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Extract e500v1/e500v2 aliasesAndreas Färber1-6/+2
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Extract MPC85xx aliasesAndreas Färber1-85/+17
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Extract 604e aliasAndreas Färber1-3/+1
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Extract 601/601v aliasesAndreas Färber1-6/+2
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Extract 603r aliasAndreas Färber1-3/+1
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Extract 603e aliasAndreas Färber1-3/+1
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Extract 740/750 aliasesAndreas Färber1-5/+2
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Extract 750 aliasesAndreas Färber1-18/+6
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Extract 7x5 aliasesAndreas Färber1-5/+2
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Extract 7400 aliasAndreas Färber1-3/+1
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Extract 7410 aliasAndreas Färber1-3/+1
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Extract 7448 aliasAndreas Färber1-3/+1
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Extract 7450 aliasAndreas Färber1-3/+1
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Extract 74x1 aliasesAndreas Färber1-5/+2
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-03-08target-ppc: Extract 74x5 as aliasesAndreas Färber1-5/+2
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
generated by cgit v1.2.1 (git 2.18.0) at 2024-06-27 22:38:20 +0000