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2007-10-05Full implementation of PowerPC 64 MMU, just missing support for 1 TBj_mayer5-119/+373
2007-10-05Rename PowerPC MMUCSR0 and MMUCFG SPRs: those are not BookE specific.j_mayer2-4/+4
2007-10-05PowerPC hardware reset vector is now considered as part of the exception model.j_mayer2-137/+31
2007-10-04More cache tuning fixes:j_mayer2-3/+23
2007-10-04Make PowerPC cache line size implementation dependant.j_mayer7-60/+620
2007-10-03HID0 is a write-clear register on 970 (DBSR).j_mayer1-3/+3
2007-10-03Enable PowerPC 64 MMU model and exceptions.j_mayer1-68/+71
2007-10-03Fix PowerPC initialisation and first reset:j_mayer1-1/+4
2007-10-03We never have to export ppc_set_irq.j_mayer3-13/+40
2007-10-02Code provision for hypervisor mode memory accesses.j_mayer1-108/+245
2007-10-01Fix nasty sign-extensions when running 32 bits CPU in the 64 bits emulatorj_mayer1-10/+10
2007-10-01Fix reproductible crash: call cpu_loop_exit from micro-op, not from helper.cj_mayer3-16/+16
2007-10-01Fix missing nip updates for instructions that potentially generatej_mayer1-0/+10
2007-10-01Handle all MMU models in switches, even if it's just to abort because of lackj_mayer5-10/+169
2007-10-01More comments about unimplemented SPRs.j_mayer1-56/+110
2007-10-01Optimisations: avoid generation of duplicated micro-ops.j_mayer1-3/+14
2007-10-01Remove definitions for deprecated SLB & TLB related op helpers.j_mayer1-13/+0
2007-10-01Avoid op helpers that would just call helpers for TLB & SLB management:j_mayer6-198/+119
2007-10-01Share more SPR instanciations between all PowerPC 401 incarnations.j_mayer1-34/+18
2007-10-01Implement embedded PowerPC exceptions prefix and vectors registers.j_mayer2-24/+71
2007-10-01Share input pins and internal interrupt controller between all PowerPC 40x.j_mayer2-25/+28
2007-09-30Fix (once again) PowerPC sync weight field.j_mayer1-1/+1
2007-09-30Fix PowerPC TLB miss dump code.j_mayer1-2/+2
2007-09-30Fix inconsistent end conditions in ppc_find_xxx functions.j_mayer1-8/+9
2007-09-30* Update OEA environment, following the PowerPC 2.04 specification:j_mayer5-32/+213
2007-09-30Synchronize with latest PowerPC ISA VEA:j_mayer1-7/+23
2007-09-30Implement Process Priority Register as defined in the PowerPC 2.04 spec.j_mayer4-0/+39
2007-09-30Implement new floating-point instructions (fre, frin, friz, frip, frim)j_mayer4-0/+106
2007-09-30Improve single-precision floats load & stores:j_mayer2-52/+87
2007-09-30XER is to be treated as a 64 bits register on 64 bits implementations,j_mayer2-4/+4
2007-09-30Implement the PowerPC alternate time-base, following the 2.04 specification.j_mayer3-2/+54
2007-09-29PowerPC emulation optimization:j_mayer2-45/+10
2007-09-29Code provision for hypervisor timers resources,j_mayer1-0/+6
2007-09-29Rework PowerPC exceptions model to make it more versatile:j_mayer6-848/+1342
2007-09-29Define the proper bfd_mach to be used by the disassembler for eachj_mayer3-1/+47
2007-09-29Change POWERPC_PPC_GENERIC to POWERPC_DEFAULT.j_mayer1-19/+20
2007-09-27Move get_sp_from_cpustate from cpu.h to target_signal.h.ths1-5/+0
2007-09-27linux-user sigaltstack() syscall, by Thayne Harbaugh.ths1-0/+5
2007-09-27Build fix for PowerPC hosts, where "PPC" is a predefined macro name.ths1-15/+15
2007-09-27Implement size bit in PowerPC 64 comparisons.j_mayer1-4/+4
2007-09-27Fixes for PowerPC 64 rotate and mask instructions.j_mayer2-7/+38
2007-09-27New ppc64-linux-user target.j_mayer1-28/+0
2007-09-26Great rework and cleanups to ease PowerPC implementations definitions.j_mayer9-3145/+4288
2007-09-21Avoid compilation warnings on 32 bits hosts.j_mayer1-1/+3
2007-09-21More PowerPC definitions, from POWER 2.04 specifications and misc sources.j_mayer5-345/+1109
2007-09-21Rework PowerPC 440 TLB management (thanks to Hollis Blanchard)j_mayer4-175/+110
2007-09-21Make CPU hflags be a masked version of the PowerPC MSR.j_mayer2-4/+5
2007-09-20Move likely and unlikely macros in a common place (Aurelien Jarno).j_mayer1-4/+0
2007-09-19TARGET_FMT_lu may also be useful.j_mayer2-2/+4
2007-09-19Code provision for PowerPC BookE MMU model support.j_mayer5-14/+365