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2010-03-17Large page TLB flushPaul Brook1-3/+4
QEMU uses a fixed page size for the CPU TLB. If the guest uses large pages then we effectively split these into multiple smaller pages, and populate the corresponding TLB entries on demand. When the guest invalidates the TLB by virtual address we must invalidate all entries covered by the large page. However the address used to invalidate the entry may not be present in the QEMU TLB, so we do not know which regions to clear. Implementing a full vaiable size TLB is hard and slow, so just keep a simple address/mask pair to record which addresses may have been mapped by large pages. If the guest invalidates this region then flush the whole TLB. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-03-12Target specific usermode cleanupPaul Brook1-0/+6
Disable various target specific code that is only relevant to system emulation. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-03-12Remove cpu_get_phys_page_debug from userspace emulationPaul Brook1-5/+0
cpu_get_phys_page_debug makes no sense for userspace emulation, so remove it. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-03-12Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.Richard Henderson1-0/+17
Removes a set of ifdefs from exec.c. Introduce TARGET_VIRT_ADDR_SPACE_BITS for all targets other than Alpha. This will be used for page_find_alloc, which is supposed to be using virtual addresses in the first place. Signed-off-by: Richard Henderson <rth@twiddle.net>
2010-03-11target-ppc: fix evsrwu and evsrws (second try)Aurelien Jarno1-2/+2
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-11target-ppc: fix evsrwu and evsrwsAurelien Jarno1-2/+2
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-11target-ppc: fix evslw instructionAurelien Jarno1-1/+1
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-04KVM: Rework VCPU state writeback APIJan Kiszka2-5/+1
This grand cleanup drops all reset and vmsave/load related synchronization points in favor of four(!) generic hooks: - cpu_synchronize_all_states in qemu_savevm_state_complete (initial sync from kernel before vmsave) - cpu_synchronize_all_post_init in qemu_loadvm_state (writeback after vmload) - cpu_synchronize_all_post_init in main after machine init - cpu_synchronize_all_post_reset in qemu_system_reset (writeback after system reset) These writeback points + the existing one of VCPU exec after cpu_synchronize_state map on three levels of writeback: - KVM_PUT_RUNTIME_STATE (during runtime, other VCPUs continue to run) - KVM_PUT_RESET_STATE (on synchronous system reset, all VCPUs stopped) - KVM_PUT_FULL_STATE (on init or vmload, all VCPUs stopped as well) This level is passed to the arch-specific VCPU state writing function that will decide which concrete substates need to be written. That way, no writer of load, save or reset functions that interact with in-kernel KVM states will ever have to worry about synchronization again. That also means that a lot of reasons for races, segfaults and deadlocks are eliminated. cpu_synchronize_state remains untouched, just as Anthony suggested. We continue to need it before reading or writing of VCPU states that are also tracked by in-kernel KVM subsystems. Consequently, this patch removes many cpu_synchronize_state calls that are now redundant, just like remaining explicit register syncs. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2010-02-28target-ppc: don't print invalid opcode messages on the consoleAurelien Jarno1-11/+0
Invalid opcode messages can be perfectly normal, for example if this code is never executed. Don't print an error message on the console, but keep the message in the log for debugging purposes. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-28Revert "target-ppc: stop translation after a trap instruction"Aurelien Jarno1-12/+8
This reverts commit 6454e7be1b2504533f7ffb190d54ebe2993cb434.
2010-02-28target-ppc: stop translation after a trap instructionAurelien Jarno1-8/+12
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-27target-ppc: fix SPE evsplat* instructionsNathan Froyd1-2/+2
The shifts in the gen_evsplat* functions were expecting rA to be masked, not extracted, and so used the wrong shift amounts to sign-extend or pad with zeroes. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-27target-ppc: fix SPE evcmp* instructionsNathan Froyd1-4/+4
The CRF_{CH,CL,CH_OR_CL,CH_AND_CL} constants were all off by one bit position. Because of this, the SPE evcmp* family of instructions would store values in the result condition register that were also off by one bit position. Fixed by using the CRF_{LT,GT,EQ,SO} constants for the shift amounts. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-14PPC: Add timer when running KVMAlexander Graf1-0/+22
For some odd reason we sometimes hang inside KVM forever. I'd guess it's a race condition where we actually have a level triggered interrupt, but the infrastructure can't expose that yet, so the guest ACKs it, goes to sleep and never gets notified that there's still an interrupt pending. As a quick workaround, let's just wake up every 500 ms. That way we can assure that we're always reinjecting interrupts in time. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2010-02-14PPC: Fix large pagesAlexander Graf1-5/+4
We were masking 1TB SLB entries on the feature bit of 16 MB pages. Obviously that breaks, so let's just ignore 1TB SLB entries for now and instead do 16MB pages correctly. This fixes PPC64 Linux boot with -m above 256. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2010-02-14PPC: tell the guest about the time base frequencyAlexander Graf2-0/+49
Our guest systems need to know by how much the timebase increases every second, so there usually is a "timebase-frequency" property in the cpu leaf of the device tree. This property is missing in OpenBIOS. With qemu, Linux's fallback timebase speed and qemu's internal timebase speed match up. With KVM, that is no longer true. The guest is running at the same timebase speed as the host. This leads to massive timing problems. On my test machine, a "sleep 2" takes about 14 seconds with KVM enabled. This patch exports the timebase frequency to OpenBIOS, so it can then put them into the device tree. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2010-02-06target-ppc: change DCR helpers to target_long argumentsAurelien Jarno2-8/+8
The recent transition to always have the DCR helper functions take 32 bit values broke the PPC64 target, as target_long became 64 bits there. This patch changes DCR helpers to target_long arguments, and cast the values to 32 bit when needed. Fixes PPC64 build with --enable-debug-tcg Based on a patch from Alexander Graf <agraf@suse.de> Reported-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-01-19kill regs_to_env and env_to_regsPaolo Bonzini1-8/+0
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-01-14ppc-40x: Correct ESR for zone protection faults.Edgar E. Iglesias1-5/+18
Raise the zone protection fault in ESR for TLB faults caused by zone protection bits. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2010-01-14ppc-40x: Correct decoding of zone protection bits.Edgar E. Iglesias1-1/+1
The 40x MMU has 15 zones in the ZPR register. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2010-01-14ppc-40x: Correct check for Endian swapping TLB entries.Edgar E. Iglesias1-5/+7
Bailout on 40x TLB entries with endianess swapping only if the entry is valid. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2010-01-14ppc-40x: Get TLB attributes from TLBLO.Edgar E. Iglesias1-1/+1
The ZSEL was incorrectly beeing decoded from TLBHI. Decode it from TLBLO instead. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2009-12-21PPC: Make DCR uint32_tAlexander Graf3-9/+9
For what I know DCR is always 32 bits wide, so we should also use uint32_t to pass it along the stacks. This fixes a warning when compiling qemu-system-ppc64 with KVM enabled, making it compile without --disable-werror Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-21PPC64: Fix alternate timebaseAurelien Jarno2-2/+2
Fix the alternate time base the same way as the default timebase. SPR_ATBL should return a 64-bit value on 64 bit implementations. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-21PPC64: Fix timebaseAlexander Graf2-2/+2
On PPC we have a 64-bit time base. Usually (PPC32) this is accessed using two separate 32 bit SPR accesses to SPR_TBU and SPR_TBL. On PPC64 the SPR_TBL register acts as 64 bit though, so we get the full 64 bits as return value. If we only take the lower ones, fine. But Linux wants to see all 64 bits or it breaks. This patch makes PPC64 Linux work even after TB crossed the 32-bit boundary, which usually happened a few seconds after bootup. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-19target-ppc: fix ppc32 kvm buildAlexander Graf1-0/+2
My segment sync patch broke compilation on PPC32, because it was trying to sync the SLB even though ppc32 CPUs don't have an SLB. So let's only sync it when we're on a PP64 one! Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-03target-ppc: Get MMU state on register syncAlexander Graf1-0/+30
While x86 only needs to sync cr0-4 to know all about its MMU state and enable qemu to resolve virtual to physical addresses, we need to sync all of the segment registers on PPC to know which mapping we're in. So let's grab the segment register contents to be able to use the "x" monitor command and also enable the gdbstub to resolve virtual addresses. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-11-17kvm: Add arch reset handlerJan Kiszka1-0/+4
Will be required by succeeding changes. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-11-12kvm ppc: Remove unused labelHollis Blanchard1-1/+0
Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-11-07user: move CPU reset call to main.c for x86/PPC/SparcBlue Swirl1-3/+0
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-11-07PPC: rename cpu_ppc_reset to cpu_reset for consistencyBlue Swirl2-5/+2
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-11-07PPC: remove unneeded calls to device resetBlue Swirl1-0/+2
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-23target-ppc: move often used CPU fields at the top of the structureAurelien Jarno1-4/+4
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-18target-ppc: simpler definitions for microcontrollers based on e300Thomas Monjalon1-68/+44
No need to alias e300 core for each CPU package. Differences between microcontrollers have to be implemented in a higher layer than translate_init.c Signed-off-by: Thomas Monjalon <thomas@monjalon.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-18target-ppc: add declarations of microcontrollers based on e300Thomas Monjalon1-8/+40
Add CPU declarations of MPC8343, MPC8343E, MPC8347 and MPC8347E. Signed-off-by: Thomas Monjalon <thomas@monjalon.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-18target-ppc: better support of e300 CPU coreThomas Monjalon1-2/+8
Declare HID2 register. Use high BATs for e300 (8 instead of 4). Fix index of high BATs registers. Before the fix, IBAT4-7 were overwriting IBAT0-3. Signed-off-by: François Armand <francois.armand@os4i.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-01Revert "Get rid of _t suffix"Anthony Liguori6-233/+235
In the very least, a change like this requires discussion on the list. The naming convention is goofy and it causes a massive merge problem. Something like this _must_ be presented on the list first so people can provide input and cope with it. This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-01Get rid of _t suffixmalc6-235/+233
Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: malc <av1474@comtv.ru>
2009-09-28target-ppc: log instructions start in TCG codeAurelien Jarno1-0/+2
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-09-25static and inline should came before the type of the functionsJuan Quintela1-4/+4
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-09-18target-ppc: optimize slw/srw/sld/srdAurelien Jarno1-49/+49
Remove a temp local variable and a jump by computing a mask with shifts. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-09-12Fix sys-queue.h conflict for goodBlue Swirl1-2/+2
Problem: Our file sys-queue.h is a copy of the BSD file, but there are some additions and it's not entirely compatible. Because of that, there have been conflicts with system headers on BSD systems. Some hacks have been introduced in the commits 15cc9235840a22c289edbe064a9b3c19c5f49896, f40d753718c72693c5f520f0d9899f6e50395e94, 96555a96d724016e13190b28cffa3bc929ac60dc and 3990d09adf4463eca200ad964cc55643c33feb50 but the fixes were fragile. Solution: Avoid the conflict entirely by renaming the functions and the file. Revert the previous hacks. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-09-11Unexport ticks_per_sec variable. Create get_ticks_per_sec() functionJuan Quintela1-1/+1
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-08-27kvm: Simplify cpu_synchronize_state()Avi Kivity1-3/+3
cpu_synchronize_state() is a little unreadable since the 'modified' argument isn't self-explanatory. Simplify it by making it always synchronize the kernel state into qemu, and automatically flush the registers back to the kernel if they've been synchronized on this exit. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-08-24cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signalNathan Froyd1-0/+1
handle_cpu_signal is very nearly copy-paste code for each target, with a few minor variations. This patch sets up appropriate defaults for a generic handle_cpu_signal and provides overrides for particular targets that did things differently. Fixing things like the persistent (XXX: use sigsetjmp) should now become somewhat easier. Previous comments on this patch suggest that the "activate soft MMU for this block" comments refer to defunct functionality. I have removed such blocks for the appropriate targets in this patch. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-08-16Replace REGX with PRIx64Blue Swirl3-5/+4
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-08-16Replace local ADDRX/PADDRX macros with TARGET_FMT_lx/plxBlue Swirl5-174/+173
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-08-16Replace always_inline with inlineBlue Swirl6-285/+278
We define inline as always_inline. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-08-03target-ppc: add exceptions for conditional storesNathan Froyd2-20/+56
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: malc <av1474@comtv.ru>
2009-08-03target-ppc: retain l{w,d}arx loaded valueNathan Froyd5-10/+17
We do this so we can check on the corresponding stc{w,d}x. whether the value has changed. It's a poor man's form of implementing atomic operations and is valid only for NPTL usermode Linux emulation. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: malc <av1474@comtv.ru>
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