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AgeCommit message (Expand)AuthorFilesLines
2014-03-05target-ppc: Altivec 2.07: Binary Coded Decimal InstructionsTom Musta3-4/+245
2014-03-05target-ppc: Altivec 2.07: Vector Polynomial Multiply SumTom Musta3-0/+82
2014-03-05target-ppc: Altivec 2.07: Vector Gather Bits by BytesTom Musta3-0/+279
2014-03-05target-ppc: Altivec 2.07: Doubleword ComparesTom Musta3-7/+29
2014-03-05target-ppc: Altivec 2.07: vbpermq InstructionTom Musta3-0/+34
2014-03-05target-ppc: Altivec 2.07: Quadword Addition and SubtracationTom Musta3-0/+211
2014-03-05target-ppc: Altivec 2.07: Vector Doubleword Rotate and Shift InstructionsTom Musta3-0/+16
2014-03-05target-ppc: Altivec 2.07: Change Bit Masks to Support 64-bit Rotates and ShiftsTom Musta1-25/+15
2014-03-05target-ppc: Altivec 2.07: Vector Merge InstructionsTom Musta1-0/+37
2014-03-05target-ppc: Altivec 2.07: Unpack Signed Word InstructionsTom Musta3-0/+8
2014-03-05target-ppc: Altivec 2.07: Pack Doubleword InstructionsTom Musta3-0/+16
2014-03-05target-ppc: Altivec 2.07: Vector Min/Max Doubleword InstructionsTom Musta3-0/+14
2014-03-05target-ppc: Altivec 2.07: Vector Population Count InstructionsTom Musta3-4/+36
2014-03-05target-ppc: Altivec 2.07: Add Vector Count Leading ZeroesTom Musta3-0/+43
2014-03-05target-ppc: Altivec 2.07: vmuluw InstructionTom Musta3-1/+6
2014-03-05target-ppc: Altivec 2.07: Multiply Even/Odd Word InstructionsTom Musta3-0/+14
2014-03-05target-ppc: Altivec 2.07: Change VMUL_DO to Support 64-bit IntegersTom Musta1-12/+14
2014-03-05target-ppc: Altivec 2.07: Add/Subtract Unsigned Doubleword ModuloTom Musta3-0/+7
2014-03-05target-ppc: Altivec 2.07: Vector Logical InstructionsTom Musta1-0/+11
2014-03-05target-ppc: Altivec 2.07: Add Support for R-Form Dual InstructionsTom Musta1-0/+35
2014-03-05target-ppc: Altivec 2.07: Add Opcode Macro for VX Form InstructionsTom Musta1-0/+5
2014-03-05target-ppc: Altivec 2.07: Add Support for Dual Altivec InstructionsTom Musta1-0/+24
2014-03-05target-ppc: Altivec 2.07: Add GEN_VXFORM3Tom Musta1-0/+19
2014-03-05target-ppc: Altivec 2.07: Update AVR StructureTom Musta1-0/+4
2014-03-05target-ppc: Altivec 2.07: Add Instruction FlagTom Musta2-2/+5
2014-03-05target-ppc: Add Store Quadword ConditionalTom Musta1-0/+21
2014-03-05target-ppc: Add Load Quadword and ReserveTom Musta2-0/+38
2014-03-05target-ppc: Store QuadwordTom Musta1-16/+23
2014-03-05target-ppc: Load QuadwordTom Musta2-15/+23
2014-03-05target-ppc: Add is_user_mode Utility RoutineTom Musta1-0/+14
2014-03-05target-ppc: Add Flag for ISA 2.07 Load/Store Quadword InstructionsTom Musta2-2/+5
2014-03-05target-ppc: Add bctar InstructionTom Musta1-1/+10
2014-03-05target-ppc: Add Target Address SPR (TAR) to Power8Tom Musta2-1/+14
2014-03-05target-ppc: Add Flag for bctarTom Musta2-3/+5
2014-03-05target-ppc: Fix xxpermdi When T==A or T==BTom Musta1-8/+33
2014-03-05target-ppc: add extended opcodes for dcbt/dcbtstCédric Le Goater1-2/+2
2014-03-05PPC: KVM: suppress warnings about not supported SPRsAlexey Kardashevskiy1-4/+3
2014-03-05PPC: KVM: store SLB slot numberAlexey Kardashevskiy1-0/+3
2014-03-05target-ppc: Add ISA2.06 lfiwzx InstructionTom Musta1-0/+15
2014-03-05target-ppc: Enable frsqrtes on Power7 and Power8Tom Musta1-0/+3
2014-03-05target-ppc: Add ISA 2.06 ftsqrtTom Musta3-0/+42
2014-03-05target-ppc: Add ISA 2.06 ftdiv InstructionTom Musta3-10/+61
2014-03-05target-ppc: Add Flag for Power ISA V2.06 Floating Point Test InstructionsTom Musta2-4/+9
2014-03-05target-ppc: Fix and enable fri[mnpz]Tom Musta2-7/+14
2014-03-05target-ppc: Add ISA 2.06 fcfid[u][s] InstructionsTom Musta3-9/+31
2014-03-05target-ppc: Add ISA2.06 Float to Integer InstructionsTom Musta3-87/+49
2014-03-05target-ppc: Add Flag for ISA V2.06 Floating Point ConversionTom Musta2-4/+7
2014-03-05target-ppc: Add ISA 2.06 stbcx. and sthcx. InstructionsTom Musta1-47/+44
2014-03-05target-ppc: Add ISA2.06 lbarx, lharx InstructionsTom Musta1-26/+24
2014-03-05target-ppc: Add Flag for ISA2.06 Atomic InstructionsTom Musta2-4/+10
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