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2016-06-24softfloat: Implement run-time-configurable meaning of signaling NaN bitAleksandar Markovic1-3/+3
This patch modifies SoftFloat library so that it can be configured in run-time in relation to the meaning of signaling NaN bit, while, at the same time, strictly preserving its behavior on all existing platforms. Background: In floating-point calculations, there is a need for denoting undefined or unrepresentable values. This is achieved by defining certain floating-point numerical values to be NaNs (which stands for "not a number"). For additional reasons, virtually all modern floating-point unit implementations use two kinds of NaNs: quiet and signaling. The binary representations of these two kinds of NaNs, as a rule, differ only in one bit (that bit is, traditionally, the first bit of mantissa). Up to 2008, standards for floating-point did not specify all details about binary representation of NaNs. More specifically, the meaning of the bit that is used for distinguishing between signaling and quiet NaNs was not strictly prescribed. (IEEE 754-2008 was the first floating-point standard that defined that meaning clearly, see [1], p. 35) As a result, different platforms took different approaches, and that presented considerable challenge for multi-platform emulators like QEMU. Mips platform represents the most complex case among QEMU-supported platforms regarding signaling NaN bit. Up to the Release 6 of Mips architecture, "1" in signaling NaN bit denoted signaling NaN, which is opposite to IEEE 754-2008 standard. From Release 6 on, Mips architecture adopted IEEE standard prescription, and "0" denotes signaling NaN. On top of that, Mips architecture for SIMD (also known as MSA, or vector instructions) also specifies signaling bit in accordance to IEEE standard. MSA unit can be implemented with both pre-Release 6 and Release 6 main processor units. QEMU uses SoftFloat library to implement various floating-point-related instructions on all platforms. The current QEMU implementation allows for defining meaning of signaling NaN bit during build time, and is implemented via preprocessor macro called SNAN_BIT_IS_ONE. On the other hand, the change in this patch enables SoftFloat library to be configured in run-time. This configuration is meant to occur during CPU initialization, at the moment when it is definitely known what desired behavior for particular CPU (or any additional FPUs) is. The change is implemented so that it is consistent with existing implementation of similar cases. This means that structure float_status is used for passing the information about desired signaling NaN bit on each invocation of SoftFloat functions. The additional field in float_status is called snan_bit_is_one, which supersedes macro SNAN_BIT_IS_ONE. IMPORTANT: This change is not meant to create any change in emulator behavior or functionality on any platform. It just provides the means for SoftFloat library to be used in a more flexible way - in other words, it will just prepare SoftFloat library for usage related to Mips platform and its specifics regarding signaling bit meaning, which is done in some of subsequent patches from this series. Further break down of changes: 1) Added field snan_bit_is_one to the structure float_status, and correspondent setter function set_snan_bit_is_one(). 2) Constants <float16|float32|float64|floatx80|float128>_default_nan (used both internally and externally) converted to functions <float16|float32|float64|floatx80|float128>_default_nan(float_status*). This is necessary since they are dependent on signaling bit meaning. At the same time, for the sake of code cleanup and simplicity, constants <floatx80|float128>_default_nan_<low|high> (used only internally within SoftFloat library) are removed, as not needed. 3) Added a float_status* argument to SoftFloat library functions XXX_is_quiet_nan(XXX a_), XXX_is_signaling_nan(XXX a_), XXX_maybe_silence_nan(XXX a_). This argument must be present in order to enable correct invocation of new version of functions XXX_default_nan(). (XXX is <float16|float32|float64|floatx80|float128> here) 4) Updated code for all platforms to reflect changes in SoftFloat library. This change is twofolds: it includes modifications of SoftFloat library functions invocations, and an addition of invocation of function set_snan_bit_is_one() during CPU initialization, with arguments that are appropriate for each particular platform. It was established that all platforms zero their main CPU data structures, so snan_bit_is_one(0) in appropriate places is not added, as it is not needed. [1] "IEEE Standard for Floating-Point Arithmetic", IEEE Computer Society, August 29, 2008. Signed-off-by: Thomas Schwinge <thomas@codesourcery.com> Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com> Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com> Tested-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Tested-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [leon.alrae@imgtec.com: * cherry-picked 2 chunks from patch #2 to fix compilation warnings] Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2015-06-17target-s390x: PER instruction-fetch event supportAurelien Jarno1-0/+1
For the PER instruction-fetch, we can't use the QEMU breakpoint infrastructure as it triggers for a single address and not a full address range, and as it actually stop before the instruction and not before. We therefore call an helper with the just fetched instruction address, which check if the address is within the PER address range. If it is the case, an event is recorded and will be signaled through an exception. Note that we implement here the PER-3 behaviour, that is an invalid opcode is not considered as an instruction fetch. Without PER-3 this behavious is undefined. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-06-17target-s390x: PER successful-branching event supportAurelien Jarno1-0/+1
For the PER successful-branching event support, we can't rely on any QEMU infrastucture. We therefore call an helper in all places where a branch can be taken. We have to pay attention to the branch to next case, as it's still a taken branch. We don't need to care about the cases using goto_tb, as we have disabled them in the previous patch. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-06-17target-s390x: basic PER event handlingAurelien Jarno1-0/+1
This patch add basic support to generate PER exceptions. It adds two fields to the cpu structure to record for the PER address and PER code & ATMID values. When an exception is triggered and a PER event is pending, the two PER values are copied to the lowcore area. At the end of an instruction, an helper is checking for a possible pending PER event and triggers an exception in that case. For that to work with branches, we need to disable TB chaining when PER is activated. Fortunately it's already in the TB flags. Finally in case of a SERVICE CALL exception, we need to trigger the PER exception immediately after. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-06-17target-s390x: wire up I/O instructions in TCG modeAlexander Graf1-0/+11
The code handling the I/O instructions for KVM decodes the instruction itself. In TCG mode also pass the full instruction word to the helpers. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-06-17target-s390x: wire up DIAG IPL in TCG modeAurelien Jarno1-1/+1
DIAG IPL is already implemented for KVM, but not wired from TCG. For that change the format of the instruction so that we can get R1 and R3 numbers in addition to the function code. The diag function can change plenty of things, including CC, so we should enter with a static CC. Also it doesn't set the value of general register 2 to 0 as in the current code. We also need to exit the CPU loop after a reset, which means a new PSW. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-06-05target-s390x: implement TRANSLATE EXTENDED instructionAurelien Jarno1-0/+1
It is part of the basic zArchitecture instructions. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-06-05target-s390x: implement TRANSLATE AND TEST instructionAurelien Jarno1-0/+1
It is part of the basic zArchitecture instructions. Allow it to be call from EXECUTE. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-06-05target-s390x: implement LOAD FP INTEGER instructionsAurelien Jarno1-0/+3
This is needed to pass the gcc.c-torture/execute/ieee/20010114-2.c test in the gcc testsuite. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-06-05target-s390x: remove unused helpersAurelien Jarno1-2/+0
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-06-05target-s390x: optimize (negative-) abs computationAurelien Jarno1-2/+0
Now that movcond exists, it's easy to write (negative-) absolute value using TCG code instead of an helper. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-02-03target-s390: Implement LURA, LURAG, STURGRichard Henderson1-0/+3
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-28tcg: Invert the inclusion of helper.hRichard Henderson1-4/+0
Rather than include helper.h with N values of GEN_HELPER, include a secondary file that sets up the macros to include helper.h. This minimizes the files that must be rebuilt when changing the macros for file N. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-02-23target-s390x: Use mulu2 for mlgr insnRichard Henderson1-1/+0
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-01-05target-s390: Use noreturn for exception and load_pswRichard Henderson1-2/+2
Both always exit the cpu loop. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Use TCG_CALL_NO_WG for misc helpersRichard Henderson1-1/+1
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Use TCG_CALL_NO_WG for integer helpersRichard Henderson1-4/+4
The division routines do not read or write tcg registers, but can raise fixed-point divide exceptions. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Use TCG_CALL_NO_WG for floating-point helpersRichard Henderson1-39/+39
None of them read or write tcg registers, but most can raise fp exceptions. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Use TCG_CALL_NO_WG for memory helpersRichard Henderson1-15/+15
Those that do not read or write tcg registers, but can raise exceptions via memory faults. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Perform COMPARE AND SWAP inlineRichard Henderson1-3/+0
Still no proper solution for CONFIG_USER_ONLY, but the system version is significantly better. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Implement LOAD/SET FP AND SIGNALRichard Henderson1-0/+1
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Implement POPCNTRichard Henderson1-0/+1
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Implement CONVERT FROM LOGICALRichard Henderson1-0/+3
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Implement CONVERT TO LOGICALRichard Henderson1-0/+6
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Convert SERVCRichard Henderson1-1/+1
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Convert STSIRichard Henderson1-1/+1
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Convert STCKERichard Henderson1-1/+0
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Convert CSPRichard Henderson1-1/+1
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Convert STURARichard Henderson1-1/+1
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Convert RRBERichard Henderson1-1/+1
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Convert SSKERichard Henderson1-1/+1
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Convert SPT, STPTRichard Henderson1-1/+1
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Convert SCKC, STCKCRichard Henderson1-1/+1
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Convert STCKRichard Henderson1-1/+1
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Convert SCKRichard Henderson1-1/+0
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Convert STIDPRichard Henderson1-1/+0
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Convert SRSTRichard Henderson1-1/+1
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Convert CLST, MVSTRichard Henderson1-2/+2
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Convert CKSMRichard Henderson1-1/+1
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Convert IPMRichard Henderson1-1/+0
Note that the previous placement of the PM field was incorrect. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Convert LFPC, SFPCRichard Henderson1-0/+1
Note that we were failing to set the rounding mode in fpu_status. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Convert FLOGRRichard Henderson1-1/+1
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Convert CONVERT FROM FIXEDRichard Henderson1-6/+3
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Convert CONVERT TO FIXEDRichard Henderson1-6/+6
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Convert LOAD ZERORichard Henderson1-3/+0
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Convert FP SQUARE ROOTRichard Henderson1-1/+3
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Convert FP LOAD COMPLIMENT, NEGATIVE, POSITIVERichard Henderson1-6/+0
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Convert TEST DATA CLASSRichard Henderson1-3/+3
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Convert MULTIPLY AND ADD, SUBTRACTRichard Henderson1-4/+4
Use the new float*_muladd interface to softfloat. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Convert FP MULTIPLYRichard Henderson1-5/+5
Signed-off-by: Richard Henderson <rth@twiddle.net>
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