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path: root/target-sh4/translate.c
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2008-09-21Add concat_i32_i64 op.pbrook1-6/+3
2008-09-20Suppress gcc 4.x -Wpointer-sign (included in -Wall) warningsblueswir11-2/+2
2008-09-15SH4: Privilege check for instructionsaurel321-24/+43
2008-09-15sh4: doesn't set the cpu_model_straurel321-0/+1
2008-09-15SH4: sleep instruction bug fixaurel321-1/+1
2008-09-02sh4: CPU versioning.aurel321-0/+59
2008-09-02SH4: fix a regression introduced in r5122aurel321-1/+1
2008-09-01SH4: Remove dyngen leftoversaurel321-5/+0
2008-09-01SH4: final conversion to TCGaurel321-1/+7
2008-09-01SH4: convert floating-point ops to TCGaurel321-153/+249
2008-09-01SH4: Remove most uses of cpu_T[0] and cpu_T[1]aurel321-181/+427
2008-09-01SH4: TCG optimisationsaurel321-349/+236
2008-09-01SH4: Convert remaining non-fp ops to TCGaurel321-28/+109
2008-08-30SH4: Convert shift functions to TCGaurel321-3/+9
2008-08-30SH4: convert control/status register load/store to TCGaurel321-36/+58
2008-08-30SH4: Convert memory loads/stores to TCGaurel321-86/+58
2008-08-30SH4: convert some more arithmetics ops to TCGaurel321-44/+44
2008-08-29SH4: convert a few helpers to TCGaurel321-11/+13
2008-08-29SH4: convert branch/jump instructions to TCGaurel321-19/+54
2008-08-29SH4: convert simple compare instructions to TCGaurel321-15/+53
2008-08-29SH4: convert a few control or system register functions to TCGaurel321-15/+46
2008-08-29SH4: Fix bugs introduce in r5099aurel321-8/+8
2008-08-29SH4: fix xtrct Rm,Rn (broken in r5103)aurel321-1/+1
2008-08-29SH4: convert logic and arithmetic ops to TCGaurel321-101/+111
2008-08-29SH4: use TCG variables for gregsaurel321-200/+202
2008-08-28SH4: use uint32_t/i32 based types/opsaurel321-30/+30
2008-08-28SH4: Convert register moves to TCGaurel321-177/+209
2008-08-28SH4: Convert dyngen registers moves to TCGaurel321-9/+9
2008-08-28SH4: Convert immediate loads to TCGaurel321-4/+4
2008-08-28SH4: add support for TCG helpersaurel321-0/+7
2008-08-28SH4: Init TCG variablesaurel321-1/+3
2008-08-22sh4: fix tas.b @Rn instructionaurel321-1/+6
2008-08-22[sh4] code translation bug fixaurel321-4/+18
2008-08-22[sh4] delay slot bug fixaurel321-0/+13
2008-08-22[sh4] sleep instructionaurel321-1/+6
2008-08-17Fix warnings that would be generated by gcc -Wstrict-prototypesblueswir11-1/+1
2008-07-18Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.ths1-6/+5
2008-06-29Add missing static qualifiers.pbrook1-1/+1
2008-06-29Add instruction counter.pbrook1-0/+31
2008-05-09SH4 MMU improvementsaurel321-0/+4
2008-04-28Factorize code in translate.caurel321-0/+7
2008-04-11Remove osdep.c/qemu-img code duplicationaurel321-0/+1
2008-03-11SH4, fix several instructionsaurel321-51/+82
2008-02-01use the TCG code generatorbellard1-40/+10
2007-12-02SH4 delay slot code update, by Magnus Damm.ths1-45/+72
2007-11-11fixed FPU rounding initbellard1-2/+2
2007-11-10added cpu_model parameter to cpu_init()bellard1-1/+1
2007-09-29Fix rte opcode, by Magnus Damm.ths1-1/+1
2007-09-16find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths1-1/+1
2007-09-11Fix tb->size mishandling, by Daniel Jacobowitz.ths1-1/+0
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