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2012-06-07build: move other target-*/ objects to nested Makefile.objsPaolo Bonzini1-1/+2
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07build: move libobj-y variable to nested Makefile.objsPaolo Bonzini1-1/+3
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07build: move obj-TARGET-y variables to nested Makefile.objsPaolo Bonzini1-0/+1
Also drop duplicate occurrence of device-hotplug.o. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-04Kill off cpu_state_reset()Andreas Färber1-5/+0
In commit 1bba0dc932e8826a7d030df3767daf0bc339f9a2 cpu_reset() was renamed to cpu_state_reset(), to allow introducing a new cpu_reset() that would operate on QOM objects. All callers have been updated except for one in target-mips, so drop all implementations except for the one in target-mips and move the declaration there until MIPSCPU reset can be fully QOM'ified. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> (for mb + cris) Acked-by: Alexander Graf <agraf@suse.de> (for ppc) Acked-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-04target-sh4: Let cpu_sh4_init() return SuperHCPUAndreas Färber2-4/+12
Turn cpu_init macro into a static inline function returning CPUSH4State for backwards compatibility. Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-30target-sh4: Start QOM'ifying CPU initAndreas Färber2-2/+11
Move code from cpu_sh4_init() into a QOM initfn. Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-30target-sh4: QOM'ify CPU resetAndreas Färber2-21/+22
Move code from cpu_state_reset() to QOM superh_cpu_reset(). Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-30target-sh4: QOM'ify CPUAndreas Färber4-1/+135
Embed CPUSH4State as first member of SuperHCPU. Let CPUClass::reset() call cpu_state_reset() for now. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-14Use uintptr_t for various op related functionsBlue Swirl1-8/+6
Use uintptr_t instead of void * or unsigned long in several op related functions, env->mem_io_pc and GETPC() macro. Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-14Rename CPUState -> CPUArchStateAndreas Färber1-1/+1
Scripted conversion: for file in *.[hc] hw/*.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do sed -i "s/CPUState/CPUArchState/g" $file done All occurrences of CPUArchState are expected to be replaced by QOM CPUState, once all targets are QOM'ified and common fields have been extracted. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14target-sh4: Don't overuse CPUStateAndreas Färber4-44/+44
Scripted conversion: sed -i "s/CPUState/CPUSH4State/g" target-sh4/*.[hc] sed -i "s/#define CPUSH4State/#define CPUState/" target-sh4/cpu.h Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14Rename cpu_reset() to cpu_state_reset()Andreas Färber1-2/+2
Frees the identifier cpu_reset for QOM CPUs (manual rename). Don't hide the parameter type behind explicit casts, use static functions with strongly typed argument to indirect. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-28target-sh4: Clean includesStefan Weil1-6/+0
Remove some include statements which are not needed. Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Stefan Weil <sw@weilnetz.de>
2012-01-10target-sh4: ignore ocbp and ocbwb instructionsAurelien Jarno1-11/+3
ocbp and ocbwb controls the writeback of a cache line to memory. They are supposed to do nothing in case of a cache miss. Given QEMU only partially emulate caches, it is safe to ignore these instructions. This fixes a kernel oops when trying to access an rtl8139 NIC with recent versions. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-01-07target-sh4: Fix operands for fipr, ftrv instructionsStefan Weil1-3/+3
Coverity complained about right shifts of opcode (16, 18) which were larger than the size of opcode (16 bit). Using the correct shift values fixes this. Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-12-05Merge remote-tracking branch 'stefanha/trivial-patches' into stagingAnthony Liguori1-1/+1
2011-12-02fix spelling in target sub directoryDong Xu Wang1-1/+1
Cc: Richard Henderson <rth@twiddle.net> Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Alexander Graf <agraf@suse.de> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Dong Xu Wang <wdongxu@linux.vnet.ibm.com> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-11-24sh_intc: convert interrupt controller to memory APIBenoît Canet1-0/+3
Signed-off-by: Benoit Canet <benoit.canet@gmail.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2011-10-01softmmu_header: pass CPUState to tlb_fillBlue Swirl1-4/+3
Pass CPUState pointer to tlb_fill() instead of architecture local cpu_single_env hacks. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-08-20Use glib memory allocation and free functionsAnthony Liguori1-1/+1
qemu_malloc/qemu_free no longer exist after this commit. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-08-07Remove unused is_softmmu parameter from cpu_handle_mmu_faultBlue Swirl3-4/+4
Parameter is_softmmu (and its evil mutant twin brother is_softmuu) is not used in cpu_*_handle_mmu_fault() functions, remove them and adjust callers. Acked-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-30exec.h cleanupBlue Swirl2-34/+3
Move softmmu_exec.h include directives from target-*/exec.h to target-*/op_helper.c. Move also various other stuff only used in op_helper.c there. Define global env in dyngen-exec.h. For i386, move wrappers for segment and FPU helpers from user-exec.c to op_helper.c. Implement raise_exception_err_env() to handle dynamic CPUState. Move the function declarations to cpu.h since they can be used outside of op_helper.c context. LM32, s390x, UniCore32: remove unused cpu_halted(), regs_to_env() and env_to_regs(). ARM: make raise_exception() static. Convert #include "exec.h" to #include "cpu.h" #include "dyngen-exec.h" and remove now unused target-*/exec.h. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26Remove exec-all.h include directivesBlue Swirl3-3/+0
Most exec-all.h include directives are now useless, remove them. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26Move cpu_has_work and cpu_pc_from_tb to cpu.hBlue Swirl2-11/+13
Move functions cpu_has_work() and cpu_pc_from_tb() from exec.h to cpu.h. This is needed by later patches. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26exec.h: fix coding style and change cpu_has_work to return boolBlue Swirl1-2/+2
Before the next patch, fix coding style of the areas affected. Change the type of the return value from cpu_has_work() and qemu_cpu_has_work() to bool. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26cpu_loop_exit: avoid using AREG0Blue Swirl1-5/+5
Make cpu_loop_exit() take a parameter for CPUState instead of relying on global env. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-04-20Remove unused function parameter from cpu_restore_stateStefan Weil1-1/+1
The previous patch removed the need for parameter puc. Is is now unused, so remove it. Cc: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Weil <weil@mail.berlios.de>
2011-04-20Remove unused function parameters from gen_pc_load and rename the functionStefan Weil1-2/+1
Function gen_pc_load was introduced in commit d2856f1ad4c259e5766847c49acbb4e390731bd4. The only reason for parameter searched_pc was a debug statement in target-i386/translate.c. Parameter puc was needed by target-sparc until commit d7da2a10402f1644128b66414ca8f86bdea9ae7c. Remove searched_pc from the debug statement and remove both parameters from the parameter list of gen_pc_load. As the function name gen_pc_load was also misleading, it is now called restore_state_to_opc. This new name was suggested by Peter Maydell, thanks. v2: Remove last parameter, too, and rename the function. v3: Fix [] typo in target-arm/translate.c. Fix wrong SHA1 object name in commit message (copy+paste error). Cc: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Weil <weil@mail.berlios.de>
2011-04-12target-sh4: get rid of CPU_{Float,Double}UAurelien Jarno2-158/+92
SH4 is always using softfloat, so it's possible to have helpers directly taking float32 or float64 value. This allow to get rid of conversions through CPU_{Float,Double}U. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-10Fix conversions from pointer to tcg_target_longStefan Weil1-1/+1
tcg_gen_exit_tb takes a parameter of type tcg_target_long, so the type casts of pointer to long should be replaced by type casts of pointer to tcg_target_long (suggested by Blue Swirl). These changes are needed for build environments where sizeof(long) != sizeof(void *), especially for w64. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-13inline cpu_halted into sole callerPaolo Bonzini1-10/+0
All implementations are now the same, and there is only one caller, so inline the function there. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-03-03target-sh4: move intr_at_halt out of cpu_halted()Aurelien Jarno4-4/+4
All targets except SH4 have the same cpu_halted() routine, and it has only one caller. It is therefore a good candidate for inlining. The difference is the handling of the intr_at_halt, which is necessary to ignore SR.BL when sleeping. Move intr_at_halt handling out of it, by setting this variable while executing the sleep instruction, and clearing it when the CPU has been woken-up by an interrupt, whatever the state of SR.BL. Also rename this variable in_sleep. Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-04target-sh4: fix negcAurelien Jarno1-2/+2
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-26target-sh4: update PTEH upon MMU exceptionAlexandre Courbot1-0/+4
Update the PTEH register to contain the VPN at which an MMU exception occured as specified by the SH4 reference. Signed-off-by: Alexandre Courbot <gnurou@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-26sh4: implement missing mmaped TLB read functionsAurelien Jarno2-0/+82
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-26sh4: implement missing mmaped TLB write functionsAurelien Jarno2-3/+67
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-25target-sh4: fix index of address read error exceptionAlexandre Courbot1-1/+1
Exception index of address read error should be 0x0e0. Signed-off-by: Alexandre Courbot <gnurou@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-25target-sh4: fix TLB invalidation codeAlexandre Courbot1-2/+2
In cpu_sh4_invalidate_tlb, the UTLB was invalidated twice and the ITLB left unchaged, probably because of some unfortunate copy/paste. Signed-off-by: Alexandre Courbot <gnurou@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-16target-sh4: implement negc using TCGAurelien Jarno3-17/+15
Using setcond it's now possible to generate a relatively short negc instruction in TCG. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-16target-sh4: use rotl/rotr when possibleAurelien Jarno1-5/+3
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-15target-sh4: correct use of ! and &Aurelien Jarno1-2/+2
Fix wrong usage of ! and & in MMU related functions. Thanks to Blue Swirl for reporting the issue. Reported-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14target-sh4: use setcond when possibleAurelien Jarno1-29/+27
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14target-sh4: log instructions start in TCG codeAurelien Jarno1-0/+4
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14target-sh4: simplify comparisons after a 'and' opAurelien Jarno1-3/+3
When a TCG variable is anded with a value and the compared with the same value, we can simply invert the comparison and compare it with 0. The generated code is smaller. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14target-sh4: fix reset on r2dAurelien Jarno2-18/+16
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14target-sh4: optimize exceptionsAurelien Jarno2-15/+12
As exception is not the normal path, don't bother saving PC, before raising one, instead rely on code retranslation to get the CPU state. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14target-sh4: add ftrv instructionAurelien Jarno3-0/+38
Add the ftrv XMTRX,FVn instruction, which computes the 4-row x 4-column matrix XMTRX by the 4-dimensional vector FVn. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14target-sh4: add fipr instructionAurelien Jarno3-0/+33
Add the fipr FVm,FVn instruction, which computes the inner products of a 4-dimensional single precision floating-point vector. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14target-sh4: implement FPU exceptionsAurelien Jarno1-22/+136
FPU exception support where not implemented on SH4. Implement them by clearing the softfloat exceptions flags before an FP instruction (the SH4 FPU also clear them before an instruction), and calling a function to update the FPSCR register after an FP instruction. This function update the corresponding FPSCR bits (both flags and cumulative flags) and trigger exception if enabled. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14target-sh4: implement flush-to-zeroAurelien Jarno2-0/+2
When the FPSCR.DN bit is set, the SH4 FPU treat denormalized numbers as zero. Enable the corresponding softfloat option when this bit is set. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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