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path: root/target-sparc/cpu.h
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2013-03-12cpu: Replace do_interrupt() by CPUClass::do_interrupt methodAndreas Färber1-1/+0
This removes a global per-target function and thus takes us one step closer to compiling multiple targets into one executable. It will also allow to override the interrupt handling for certain CPU families. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-03-12cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber1-2/+3
Both fields are used in VMState, thus need to be moved together. Explicitly zero them on reset since they were located before breakpoints. Pass PowerPCCPU to kvmppc_handle_halt(). Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-23SPARC LEON power-down support addedRonald Hecht1-0/+1
Signed-off-by: Ronald Hecht <address@hidden> Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-19fpu: move public header file to include/fpuPaolo Bonzini1-1/+1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19misc: move include files to include/qemu/Paolo Bonzini1-1/+1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19exec: move include files to include/exec/Paolo Bonzini1-3/+3
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-16exec: refactor cpu_restore_stateBlue Swirl1-1/+0
Refactor common code around calls to cpu_restore_state(). tb_find_pc() has now no external users, make it static. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-07target-sparc: Remove t0, t1 from CPUSPARCStateRichard Henderson1-1/+0
These fields are no longer used. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2012-11-03Merge branch 'trivial-patches' of git://github.com/stefanha/qemuBlue Swirl1-3/+0
* 'trivial-patches' of git://github.com/stefanha/qemu: pc: Drop redundant test for ROM memory region exec: make some functions static target-ppc: make some functions static ppc: add missing static vnc: add missing static vl.c: add missing static target-sparc: make do_unaligned_access static m68k: Return semihosting errno values correctly cadence_uart: More debug information Conflicts: target-m68k/m68k-semi.c
2012-11-01target-sparc: make do_unaligned_access staticBlue Swirl1-3/+0
Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2012-10-31cpus: Pass CPUState to [qemu_]cpu_has_work()Andreas Färber1-1/+3
For target-mips also change the return type to bool. Make include paths for cpu-qom.h consistent for alpha and unicore32. Signed-off-by: Andreas Färber <afaerber@suse.de> [AF: Updated new target-openrisc function accordingly] Acked-by: Richard Henderson <rth@twiddle.net> (for alpha)
2012-10-23Rename target_phys_addr_t to hwaddrAvi Kivity1-2/+2
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are reserved) and its purpose doesn't match the name (most target_phys_addr_t addresses are not target specific). Replace it with a finger-friendly, standards conformant hwaddr. Outstanding patchsets can be fixed up with the command git rebase -i --exec 'find -name "*.[ch]" | xargs s/target_phys_addr_t/hwaddr/g' origin Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-10-07target-sparc: Move sdivx and udivx out of lineRichard Henderson1-0/+1
The branches around the exception are maintaining an otherwise unnecessary use of local temps for the cpu destination. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-04target-sparc: Let cpu_sparc_init() return SPARCCPUAndreas Färber1-3/+14
Make include paths for cpu-qom.h consistent, so that SPARCCPU can be used in cpu.h. Turn cpu_init macro into a static inline function returning CPUSPARCState for backwards compatibility. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Blue Swirl <blauwirbel@gmail.com>
2012-04-14Use uintptr_t for various op related functionsBlue Swirl1-1/+1
Use uintptr_t instead of void * or unsigned long in several op related functions, env->mem_io_pc and GETPC() macro. Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-04-07target-sparc: QOM'ify CPUAndreas Färber1-0/+1
Embed CPUSPARCState as first member of SPARCCPU. Drop cpu_sparc_close() in favor of object_delete() and a finalizer. Let cpu_state_reset() call cpu_reset(). Make TYPE_SPARC_CPU non-abstract for now. Distinguish between "sparc-cpu" and "sparc64-cpu". Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-24target-sparc: Add compiler attribute to some functions which don't returnStefan Weil1-2/+3
helper_raise_exception does not return, nor does do_unaligned_access. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-18Sparc: avoid AREG0 wrappers for memory access helpersBlue Swirl1-83/+2
Adjust generation of load and store templates so that the functions take a parameter for CPUState instead of relying on global env. Remove wrappers. Move remaining memory helpers to ldst_helper.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-18Sparc: avoid AREG0 for memory access helpersBlue Swirl1-0/+82
Make memory access helpers take a parameter for CPUState instead of relying on global env. Introduce wrappers for load and store ops. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-17sparc64: implement PCI and ISA irqsBlue Swirl1-0/+3
Generate correct trap for external interrupts. Map PCI and ISA IRQs to RIC/UltraSPARC-IIi interrupt vectors. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-17sparc: reset CPU state on resetBlue Swirl1-2/+3
Not strictly accurate for Sparc64 but avoid confusing Valgrind. Reported-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-14Rename CPUState -> CPUArchStateAndreas Färber1-1/+1
Scripted conversion: for file in *.[hc] hw/*.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do sed -i "s/CPUState/CPUArchState/g" $file done All occurrences of CPUArchState are expected to be replaced by QOM CPUState, once all targets are QOM'ified and common fields have been extracted. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14target-sparc: Don't overuse CPUStateAndreas Färber1-28/+28
Scripted conversion: sed -i "s/CPUState/CPUSPARCState/g" target-sparc/*.[hc] sed -i "s/#define CPUSPARCState/#define CPUState/" target-sparc/cpu.h Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14target-sparc: Typedef struct CPUSPARCState earlyAndreas Färber1-2/+4
Will be needed for qemu_irq_ack callback. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2011-10-26target-sparc: Change fpr representation to doubles.Richard Henderson1-3/+4
This allows a more efficient representation for 64-bit hosts. It should be about the same for 32-bit hosts, as we can still access the individual pieces of the double. Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-10-26target-sparc: Pass float64 parameters instead of dt0/1 temporaries.Richard Henderson1-1/+0
Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-10-26Sparc: split MMU helpersBlue Swirl1-1/+1
Move MMU helpers to mmu_helper.c. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-26Sparc: avoid AREG0 for softint op helpers and Leon cache controlBlue Swirl1-6/+25
Make softint op helpers and Leon cache irq manager take a parameter for CPUState instead of relying on global env. Move the functions to int{32,64}_helper.c. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-23Sparc: split CWP and PSTATE op helpersBlue Swirl1-1/+3
Move CWP and PSTATE op helpers to win_helper.c. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-23Sparc: split helper.cBlue Swirl1-1/+2
Move CPU init to cpu_init.c and interrupt handling to int32_helper.c for Sparc32 and int64_helper.c for Sparc64. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-10Gdbstub: Fix back-trace on SPARC32Fabien Chouteau1-0/+7
Gdb expects all registers windows to be flushed in ram, which is not the case in Qemu. Therefore the back-trace generation doesn't work. This patch adds a function to handle reads (and only read) in stack frames as if windows were flushed. Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-08-07Remove unused is_softmmu parameter from cpu_handle_mmu_faultBlue Swirl1-1/+1
Parameter is_softmmu (and its evil mutant twin brother is_softmuu) is not used in cpu_*_handle_mmu_fault() functions, remove them and adjust callers. Acked-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-21SPARC64: implement addtional MMU faults related to nonfaulting loadTsuneo Saito1-0/+4
This patch implements MMU faults caused by TTE.NFO and TTE.E: - access other than nonfaulting load to a page marked NFO should raise data_access_exception - nonfaulting load to a page marked with E bit should raise data_access_exception To distinguish nonfaulting loads, this patch extends (abuses?) the rw argument of get_physical_address_data(). rw is set to 4 on nonfaulting loads. Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-21SPARC64: split cpu_get_phys_page_debug() from cpu_get_phys_page_nofault()Tsuneo Saito1-0/+2
This patch makes cpu_get_phys_page_debug() independent from cpu_get_phys_page_nofault() in advance of implementing nonfaulting load. This also modifies cpu_get_phys_page_nofault() to be compiled only on TARGET_SPARC64 because it is not required on SPARC32. Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-21SPARC64: SFSR cleanup and fixTsuneo Saito1-0/+22
Add macros for SFSR fields and use macros instead of magic numbers. Also fix the update of the register fields on MMU faults. Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-21SPARC64: TTE bits cleanupTsuneo Saito1-0/+7
Add macros for TTE bits and modify to use macros instead of magic numbers. Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-20Fix unassigned memory access handlingBlue Swirl1-2/+2
cea5f9a28faa528b6b1b117c9ab2d8828f473fef exposed bugs in unassigned memory access handling. Fix them by always passing CPUState to the handlers. Reported-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-14Sparc: fix FPU and AM enable checks for translationBlue Swirl1-16/+33
Translation used incorrectly CPUState fields directly to check for FPU enable state and 32 bit address masking on Sparc64. Fix by using TB flags instead. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26Move cpu_has_work and cpu_pc_from_tb to cpu.hBlue Swirl1-0/+14
Move functions cpu_has_work() and cpu_pc_from_tb() from exec.h to cpu.h. This is needed by later patches. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26sparc: move do_interrupt to helper.cBlue Swirl1-0/+4
do_interrupt() was mixing CPUState pointer passed from caller and global env (AREG0). Fix by moving the function to helper.c. Introduce a helper for calling change_pstate() safely from outside of execution context. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26Sparc32: dummy implementation of MXCC MMU breakpoint registersBlue Swirl1-1/+3
Add dummy registers for SuperSPARC MXCC MMU counter breakpoints, save and load all MXCC registers. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-02-01SPARC: Fix Leon3 cache controlFabien Chouteau1-2/+6
The "leon3_cache_control_int" (op_helper.c) function is called within leon3.c which leads to segfault error with the global "env". Now cache control is a CPU feature and everything is handled in op_helper.c. Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-24SPARC: Add asr17 register supportFabien Chouteau1-0/+1
This register is activated by CPU_FEATURE_ASR17 in the feature field. Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-24SPARC: Emulation of Leon3Fabien Chouteau1-14/+23
Leon3 is an open-source VHDL System-On-Chip, well known in space industry (more information on http://www.gaisler.com). Leon3 is made of multiple components available in the GrLib VHDL library. Three devices are implemented: uart, timers and IRQ manager. You can find code for these peripherals in the grlib_* files. Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-12-19Sparc: implement monitor command 'info tlb'Blue Swirl1-1/+1
Use existing dump_mmu() to implement monitor command 'info tlb'. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-12-04target-sparc: Use fprintf_function (format checking)Stefan Weil1-2/+2
This change was missing in commit 9a78eead0c74333a394c0f7bbfc4423ac746fcd5. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-12-03target-sparc: remove unused functions cpu_lock(), cpu_unlock()Peter Maydell1-2/+0
2010-07-03remove exec-all.h inclusion from cpu.hPaolo Bonzini1-1/+0
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-07-03move cpu_pc_from_tb to target-*/exec.hPaolo Bonzini1-6/+0
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-22sparc64: fix mmu context at trap levels above zeroIgor V. Kovalenko1-4/+10
- cpu_mmu_index return MMU_NUCLEUS_IDX if trap level is not zero - cpu_get_tb_cpu_state: store trap level and primary context in flags this allows to restart code translation when address translation is changed - stop translation block after writing to pstate and tl registers - stop translation block after writing to alternate space this can be optimized to stop only if address translation can be changed by write operation (e.g. by comparing with MMU ASI values) Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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