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path: root/target-sparc/cpu.h
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2008-03-16 Convert mulscc to TCG, add cc_src2blueswir11-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4075 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-13 Convert condition code changing versions of add, sub, logic, and div to TCGblueswir11-0/+5
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4052 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-06 Convert exception ops to TCGblueswir11-1/+0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4022 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-05 Convert Sparc64 trap state ops to TCGblueswir11-4/+8
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4018 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-02 Convert tick operations to TCGblueswir11-3/+0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4011 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-14 Fix remote debugger memory access problems reported by Matthias Steinblueswir11-5/+8
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3982 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-11 Sparc32 MMU register fixes (Robert Reif)blueswir11-0/+4
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3979 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-28Use slavio base as boot prom address, rearrange sun4m init codeblueswir11-0/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3747 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-25 128-bit float support for user modeblueswir11-0/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3740 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-25 More MMU registers (Robert Reif)blueswir11-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3738 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-10added cpu_model parameter to cpu_init()bellard1-6/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-07 CPU specific boot mode (Robert Reif)blueswir11-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3542 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14 Sparc64 hypervisor modeblueswir11-4/+35
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3398 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14 SuperSparc MXCC support (Robert Reif)blueswir11-1/+4
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3397 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14Replace is_user variable with mmu_idx in softmmu core,j_mayer1-0/+11
allowing support of more than 2 mmu access modes. Add backward compatibility is_user variable in targets code when needed. Implement per target cpu_mmu_index function, avoiding duplicated code and #ifdef TARGET_xxx in softmmu core functions. Implement per target mmu modes definitions. As an example, add PowerPC hypervisor mode definition and Alpha executive and kernel modes definitions. Optimize PowerPC case, precomputing mmu_idx when MSR register changes and using the same definition in code translation code. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-12Unify '-cpu ?' option.j_mayer1-0/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3380 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-27Move get_sp_from_cpustate from cpu.h to target_signal.h.ths1-12/+0
Enable sigaltstack processing for more architectures. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3253 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-27linux-user sigaltstack() syscall, by Thayne Harbaugh.ths1-0/+12
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3252 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-24 CPU boot modeblueswir11-0/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3231 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-20 Detabifyblueswir11-26/+26
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3195 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-16find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
2007-08-04 Fix Sparc32 interrupt handlingblueswir11-1/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3110 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-08 Fix retry and done ops, trap handlingblueswir11-4/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3055 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-07 Report normalised CWP values to userland and GDB, not internal representationblueswir11-2/+8
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3052 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-07 Fix wrong number of clean/saveable windows, match Linux startup register valuesblueswir11-0/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3050 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-07 Fix Sparc64 page sizeblueswir11-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3047 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-03Move target-specific defines to the target directories.ths1-0/+6
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2940 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-01Enable 36-bit physical address space also on 32-bit hostsblueswir11-0/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2914 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-27Separate fault for code access to unassigned memoryblueswir11-0/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2876 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-25Implement Sparc64 CPU timers using ptimersblueswir11-0/+5
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2860 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-19Use full 36-bit physical address space on SS10blueswir11-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2830 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-17Enable faults for unassigned memory accesses and unimplemented ASIsblueswir11-0/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2824 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-06Report unassigned memory access to CPU (not enabled yet)blueswir11-1/+4
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2776 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-22Sparc64 update: more VIS opsblueswir11-0/+3
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2714 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-13Alignment check mechanism (not fully enabled yet) (Aurelien Jarno)blueswir11-0/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2655 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-05Fix stdfq op (Aurelien Jarno)blueswir11-1/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2604 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-01Fix Sparc lda/ldda/sta/stda asi handling, fault on misaligned register ↵blueswir11-1/+1
ldd/std and illegal cwp on wrpsr (Aurelien Jarno) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2568 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-01Fix Sparc co-processor ops (Aurelien Jarno)blueswir11-0/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2567 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-25Sparc32/64 CPU selectionblueswir11-6/+8
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2534 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-24Upgrade Sparc FPU version (based on patch by Aurelien Jarno)blueswir11-2/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2532 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-23Sparc tagged operations (Aurelien Jarno)blueswir11-0/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2531 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-31siginfo fix for Darwin/Mac OS X, by Pierre d'Herbemont.ths1-2/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2369 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-23Check ELF binaries for machine type and endianness.ths1-0/+6
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2274 c046a42c-6fe2-441c-8c8c-71466251a162
2006-07-18sparc64 fixes (Blue Swirl)bellard1-0/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2062 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-26SPARC FPU optimization (Blue Swirl)bellard1-0/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2023 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-21fixed sparc64 cpu fp save/restorebellard1-1/+0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2001 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-21soft floats for SPARC (Blue Swirl)bellard1-6/+4
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2000 c046a42c-6fe2-441c-8c8c-71466251a162
2005-12-05Initial SPARC SMP support (Blue Swirl)bellard1-0/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1694 c046a42c-6fe2-441c-8c8c-71466251a162
2005-11-20added CPU_COMMON and CPUState.tb_jmp_cache[]bellard1-18/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1630 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-23sparc64 fixes (Blue Swirl)bellard1-5/+16
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1514 c046a42c-6fe2-441c-8c8c-71466251a162
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