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2012-10-20target-sparc: Avoid cpu_tmp32 in Read Priv RegisterRichard Henderson1-32/+21
We don't need another temporary here. Load directly into the register we want to set. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-20target-sparc: Use get_temp_i32 in gen_dest_fpr_FRichard Henderson1-14/+14
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-20target-sparc: Split out get_temp_i32Richard Henderson1-12/+17
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-20target-sparc: Make the cpu_addr variable local to load/store handlingRichard Henderson1-11/+11
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-20target-sparc: Cleanup cpu_src[12] allocationRichard Henderson1-9/+7
Now that get_temp_tl is used for get_src[12], we don't need to pre-allocate these temporaries. Fallout from this is moving some assignments around cas/casx to avoid uninitialized variable warnings. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-20target-sparc: Finish conversion to gen_load_gprRichard Henderson1-38/+20
All users of gen_movl_{reg_TN,TN_reg} are removed. At the same time, make cpu_val a local variable for load/store disassembly. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-20target-sparc: Convert swap to gen_load/store_gprRichard Henderson1-8/+8
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-20target-sparc: Convert asi helpers to gen_*_gprRichard Henderson1-29/+32
Push the DisasContext down so that we can use gen_load/store_gpr in sode gen_ldda_asi, gen_stda_ast, gen_cas_asi, gen_casx_asi. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-20target-sparc: Use gen_load_gpr in get_src[12]Richard Henderson1-46/+29
This means we can avoid the incoming temporary, though the cleanup of the existing temporaries is not performed in this patch. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-20target-sparc: Conversion to gen_*_gpr, part 1Richard Henderson1-243/+177
Only handle the easy cases directly within disas_sparc_insn. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-20target-sparc: Add gen_load/store/dest_gprRichard Henderson1-0/+52
Infrastructure to be used to clean up handling of temporaries. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13target-sparc: Don't compute full flags value so oftenRichard Henderson3-19/+21
Avoid speculatively computing flags before every potentially trapping operation and instead do the flags computation when a trap actually occurs. This gives approximately 30% speedup in emulation. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13target-sparc: Avoid unnecessary local temporariesRichard Henderson1-21/+9
Now that save_state never ends a BB, we don't need to copy values into local temps around it. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13target-sparc: Optimize CC_OP_LOGIC conditionsRichard Henderson1-18/+40
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-13target-sparc: Fix optimized %icc comparisonsRichard Henderson1-0/+1
Signed-off-by: Richard Henderson <rth@twiddle.net> Tested-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Optimize conditionals using SUBCCRichard Henderson1-61/+131
Aka "normal" comparisons. We now have the infrastructure to pass back non-boolean results from gen_compare. This will automatically get used by both branches and conditional moves. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Fall through from not-taken trapRichard Henderson1-5/+7
Now that we've cleaned up global temporary allocation, we can continue translating the fallthru path of a conditional trap. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Cleanup "global" temporary allocationRichard Henderson1-19/+19
There are 6 temporaries that disas_sparc_insn relies on having been allocated. Now that they are no longer referenced across branches, they need not be allocated as local temps. Move the allocation/free of these temporaries to make it clear that they are local to the translation of a single insn. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Use movcond for FMOV*RRichard Henderson1-30/+16
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Use movcond in mulsccRichard Henderson1-6/+5
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Move taddcctv and tsubcctv out of lineRichard Henderson3-102/+66
The branches around the exception are maintaining an otherwise unnecessary use of local temps for the cpu destination. Note that gen_op_t{add,sub}_cc were identical to gen_op_{add,sub}_cc. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Tidy TccRichard Henderson1-38/+53
Share more code between unconditional and conditional paths. Move the computation of the trap number into the conditional BB; avoid using temporaries that have gone out of scope (cpu_tmp32) or rely on local temps (cpu_dst). Fully fold the exception number when the trap number is %g0+imm. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Move sdivx and udivx out of lineRichard Henderson5-52/+37
The branches around the exception are maintaining an otherwise unnecessary use of local temps for the cpu destination. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Use movcond in gen_generic_branchRichard Henderson1-11/+7
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Use DisasCompare and movcond in MOVRRichard Henderson1-17/+14
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Use DisasCompare and movcond in MOVCCRichard Henderson1-24/+20
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Use DisasCompare and movcond in FMOVR, FMOVCCRichard Henderson1-117/+86
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Use DisasCompare in TccRichard Henderson1-9/+11
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Introduce DisasCompare and functions to generate itRichard Henderson1-9/+83
For the moment gen_cond et al retain their existing interface, using setcond to turn a (potential) comparison back into a boolean. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Tidy gen_generic_branch interfaceRichard Henderson1-8/+7
The arguments passed are always the same. Pass down just DisasContext instead. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Tidy save_npc interfaceRichard Henderson1-4/+4
Use the cpu_cond global register directly instead of passing it down. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Tidy gen_mov_pc_npc interfaceRichard Henderson1-6/+6
Use the cpu_cond global register directly instead of passing it down. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Tidy save_state interfaceRichard Henderson1-49/+49
Use the cpu_cond global register directly instead of passing it down. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Tidy gen_trap_ifnofpu interfaceRichard Henderson1-18/+28
We always pass cpu_cond to the cond parameter. Use that global register directly instead of passing it down. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Tidy flush_cond interfaceRichard Henderson1-5/+5
We always pass cpu_cond to the cond parameter. Use that global register directly instead of passing it down. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Tidy do_branch interfacesRichard Henderson1-20/+18
We always pass cpu_cond to the r_cond parameter. Use that global register directly instead of passing it down. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Make CPU_LOG_INT useful by defaultRichard Henderson2-11/+4
No need for ifdefs when the log mask does just as well. No need to print pc/npc when we're dumping the whole cpu state. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-07target-sparc: Tidy cpu_dump_stateRichard Henderson1-4/+3
We don't really need to be told that %g are general register, etc. Issue a trailing newline to separate blocks. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-10-05sparc: use g_strdup in place of unchecked strdupJim Meyering1-2/+2
This avoids a NULL-deref upon strdup failure. Also update matching free to g_free. Signed-off-by: Jim Meyering <meyering@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-09-27Emit debug_insn for CPU_LOG_TB_OP_OPT as well.Richard Henderson1-1/+2
For all targets that currently call tcg_gen_debug_insn_start, add CPU_LOG_TB_OP_OPT to the condition that gates it. This is useful for comparing optimization dumps, when the pre-optimization dump is merely noise. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-15Remove unused CONFIG_TCG_PASS_AREG0 and dead codeBlue Swirl1-2/+0
Now that CONFIG_TCG_PASS_AREG0 is enabled for all targets, remove dead code and support for !CONFIG_TCG_PASS_AREG0 case. Remove dyngen-exec.h and all references to it. Although included by hw/spapr_hcall.c, it does not seem to use it. Remove unused HELPER_CFLAGS. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2012-09-08target-sparc: fix fcmp{s,d,q} instructions wrt exceptionAurelien Jarno1-40/+27
fcmp{s,d,q} instructions are supposed to ignore quiet NaN (contrary to the fcmpe{s,d,q} instructions), but the current code is wrongly setting the NV exception in that case. Moreover the current code is duplicated: first the arguments are checked for NaN to generate an exception, and later in case the comparison is unordered (which can only happens if one of the argument is a NaN), the same check is done to generate an exception. Fix that by calling clear_float_exceptions() followed by check_ieee_exceptions() as for the other floating point instructions. Use the _compare_quiet functions for fcmp{s,d,q} and the _compare ones for fcmpe{s,d,q}. Simplify the flag setting by not clearing a flag that is set the line just below. This fix allows the math glibc testsuite to pass. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-21qemu-log: use LOG_UNIMP for some target CPU casesBlue Swirl1-32/+48
Use LOG_UNIMP for some target CPU cases. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Acked-by: Alexander Graf <agraf@suse.de>
2012-06-07build: move other target-*/ objects to nested Makefile.objsPaolo Bonzini1-1/+2
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07build: move libobj-y variable to nested Makefile.objsPaolo Bonzini1-1/+7
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07build: move obj-TARGET-y variables to nested Makefile.objsPaolo Bonzini1-0/+1
Also drop duplicate occurrence of device-hotplug.o. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-04Kill off cpu_state_reset()Andreas Färber1-5/+0
In commit 1bba0dc932e8826a7d030df3767daf0bc339f9a2 cpu_reset() was renamed to cpu_state_reset(), to allow introducing a new cpu_reset() that would operate on QOM objects. All callers have been updated except for one in target-mips, so drop all implementations except for the one in target-mips and move the declaration there until MIPSCPU reset can be fully QOM'ified. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> (for mb + cris) Acked-by: Alexander Graf <agraf@suse.de> (for ppc) Acked-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-04target-sparc: Let cpu_sparc_init() return SPARCCPUAndreas Färber2-5/+16
Make include paths for cpu-qom.h consistent, so that SPARCCPU can be used in cpu.h. Turn cpu_init macro into a static inline function returning CPUSPARCState for backwards compatibility. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Blue Swirl <blauwirbel@gmail.com>
2012-05-12fix block loads broken in commit 30038fd818Artyom Tarasenko1-1/+1
Fix UltraSPARC/JPS1/UA2007 VIS block load instructions broken in 30038fd81808f7c3bca92be2369e74c8ca7b3d69. Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> [blauwirbel@gmail.com: trimmed unwanted part of patch] Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-05-12Implement address masking for SPARC v9 CPUsArtyom Tarasenko1-1/+24
According to UltraSPARC - IIi User's manual: 14.1.11 Address Masking (Impdep #125) When PSTATE.AM=1, the CALL, JMPL, and RDPC instructions and all traps transmit zero in the high-order 32-bits of the PC to their specified destination registers. Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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