peter/qemu - QEMU hacking for Peter

Age	Commit message (Expand)	Author	Files	Lines
2014-12-21	target-tricore: Add instructions of RR1 opcode format, that have 0xb3 as firs...	Bastian Koppelmann	1	-0/+197
2014-12-21	target-tricore: Fix MFCR/MTCR insn and B format offset.	Bastian Koppelmann	1	-2/+4
2014-12-21	target-tricore: Add missing 1.6 insn of BOL opcode format	Bastian Koppelmann	1	-1/+48
2014-12-21	target-tricore: Add instructions of RR opcode format, that have 0x4b as the f...	Bastian Koppelmann	1	-0/+183
2014-12-21	target-tricore: Add instructions of RR opcode format, that have 0x1 as the fi...	Bastian Koppelmann	1	-0/+97
2014-12-21	target-tricore: Add instructions of RR opcode format, that have 0xf as the fi...	Bastian Koppelmann	1	-0/+78
2014-12-21	target-tricore: Add instructions of RR opcode format, that have 0xb as the fi...	Bastian Koppelmann	1	-0/+383
2014-12-21	target-tricore: Fix mask handling JNZ.T being 7 bit long	Bastian Koppelmann	1	-2/+2
2014-12-21	target-tricore: pretty-print register dump and show more status registers	Alex Zuepke	1	-6/+15
2014-12-21	target-tricore: add missing 64-bit MOV in RLC format	Alex Zuepke	1	-0/+12
2014-12-21	target-tricore: typo in BOL format	Alex Zuepke	1	-2/+2
2014-12-10	target-tricore: Add instructions of RCR opcode format	Bastian Koppelmann	1	-0/+479
2014-12-10	target-tricore: Add instructions of RLC opcode format	Bastian Koppelmann	1	-0/+113
2014-12-10	target-tricore: Add instructions of RCPW, RCRR and RCRW opcode format	Bastian Koppelmann	1	-3/+129
2014-12-10	target-tricore: Make TRICORE_FEATURES implying others.	Bastian Koppelmann	1	-3/+3
2014-12-10	target-tricore: Add instructions of RC opcode format	Bastian Koppelmann	1	-0/+693
2014-12-10	target-tricore: Add instructions of BRR opcode format	Bastian Koppelmann	1	-2/+88
2014-12-10	target-tricore: Add instructions of BRN opcode format	Bastian Koppelmann	1	-0/+26
2014-12-10	target-tricore: Add instructions of BRC opcode format	Bastian Koppelmann	1	-1/+52
2014-12-10	target-tricore: Add instructions of BOL opcode format	Bastian Koppelmann	1	-0/+48
2014-10-20	target-tricore: Add instructions of BO opcode format	Bastian Koppelmann	1	-0/+663
2014-10-20	target-tricore: Add instructions of BIT opcode format	Bastian Koppelmann	1	-0/+312
2014-10-20	target-tricore: Add instructions of B opcode format	Bastian Koppelmann	1	-0/+27
2014-10-20	target-tricore: Add instructions of ABS, ABSB opcode format	Bastian Koppelmann	1	-0/+303
2014-09-01	target-tricore: Add instructions of SR opcode format	Bastian Koppelmann	1	-0/+111
2014-09-01	target-tricore: Add instructions of SLR, SSRO and SRO opcode format	Bastian Koppelmann	1	-0/+121
2014-09-01	target-tricore: Add instructions of SC opcode format	Bastian Koppelmann	1	-0/+48
2014-09-01	target-tricore: Add instructions of SBR opcode format	Bastian Koppelmann	1	-1/+65
2014-09-01	target-tricore: Add instructions of SBC and SBRN opcode format	Bastian Koppelmann	1	-0/+36
2014-09-01	target-tricore: Add instructions of SB opcode format	Bastian Koppelmann	1	-0/+93
2014-09-01	target-tricore: Add instructions of SRRS and SLRO opcode format	Bastian Koppelmann	1	-0/+59
2014-09-01	target-tricore: Add instructions of SSR opcode format	Bastian Koppelmann	1	-0/+50
2014-09-01	target-tricore: Add instructions of SRR opcode format	Bastian Koppelmann	1	-0/+164
2014-09-01	target-tricore: Add instructions of SRC opcode format	Bastian Koppelmann	1	-0/+251
2014-09-01	target-tricore: Add masks and opcodes for decoding	Bastian Koppelmann	1	-0/+1
2014-09-01	target-tricore: Add initialization for translation and activate target	Bastian Koppelmann	1	-0/+165
2014-09-01	target-tricore: Add target stubs and qom-cpu	Bastian Koppelmann	1	-0/+100