summaryrefslogtreecommitdiff
path: root/target/arm
AgeCommit message (Expand)AuthorFilesLines
2017-03-14target/arm/arm-powerctl: Fix psci info return valuesAndrew Jones1-2/+2
2017-03-14target/arm: implement armv8 PMUSERENR (user-mode enable bits)Andrew Baumann1-8/+71
2017-03-09target/arm/helper: make it clear the EC field is also in hexAlex Bennée1-1/+1
2017-03-03KVM: do not use sigtimedwait to catch SIGBUSPaolo Bonzini1-5/+0
2017-03-03KVM: remove kvm_arch_on_sigbusPaolo Bonzini1-5/+0
2017-02-28target-arm: Add GICv3CPUState in CPUARMState structVijaya Kumar K1-0/+2
2017-02-28armv7m: Raise correct kind of UsageFault for attempts to execute ARM codePeter Maydell3-2/+11
2017-02-28armv7m: Check exception return consistencyPeter Maydell2-12/+112
2017-02-28armv7m: Extract "exception taken" code into functionsPeter Maydell1-50/+68
2017-02-28armv7m: Simpler and faster exception startMichael Davidsaver1-6/+9
2017-02-28armv7m: Remove unused armv7m_nvic_acknowledge_irq() return valuePeter Maydell2-2/+2
2017-02-28armv7m: Escalate exceptions to HardFault if necessaryMichael Davidsaver1-2/+0
2017-02-28armv7m: Fix condition check for taking exceptionsPeter Maydell2-8/+16
2017-02-28Add missing fp_access_check() to aarch64 crypto instructionsNick Reilly1-0/+12
2017-02-24tcg: enable MTTCG by default for ARM on x86 hostsAlex Bennée1-0/+3
2017-02-24target-arm: ensure all cross vCPUs TLB flushes completeAlex Bennée1-96/+69
2017-02-24target-arm: don't generate WFE/YIELD calls for MTTCGAlex Bennée3-6/+29
2017-02-24target-arm/powerctl: defer cpu reset work to CPU contextAlex Bennée7-74/+201
2017-02-24cputlb and arm/sparc targets: convert mmuidx flushes from varg to bitmapAlex Bennée1-44/+72
2017-02-24tcg: drop global lock during TCG code executionJan Kiszka2-4/+45
2017-02-10target-arm: Enable vPMU support under TCG modeWei Huang2-7/+2
2017-02-10target-arm: Add support for PMU register PMINTENSET_EL1Wei Huang2-2/+10
2017-02-10target-arm: Add support for AArch64 PMU register PMXEVTYPER_EL0Wei Huang2-6/+25
2017-02-10target-arm: Add support for PMU register PMSELR_EL0Wei Huang2-6/+22
2017-02-07target/arm: A32, T32: Create Instruction Syndromes for Data AbortsPeter Maydell3-63/+149
2017-02-07target/arm: Abstract out pbit/wbit tests in ARM ldr/str decodePeter Maydell1-3/+6
2017-02-07arm: Correctly handle watchpoints for BE32 CPUsJulian Brown3-0/+30
2017-02-07Fix Thumb-1 BE32 execution and disassembly.Julian Brown2-1/+32
2017-02-07target/arm: Add cfgend parameter for ARM CPU selection.Julian Brown2-0/+20
2017-02-01arm: add trailing ; after MISMATCH_CHECKMichael S. Tsirkin1-49/+49
2017-02-01arm: better stub version for MISMATCH_CHECKMichael S. Tsirkin1-1/+3
2017-01-27armv7m: R14 should reset to 0xffffffffPeter Maydell1-0/+3
2017-01-27armv7m: FAULTMASK should be 0 on resetMichael Davidsaver1-4/+6
2017-01-27armv7m: Report no-coprocessor faults correctlyPeter Maydell3-0/+13
2017-01-27armv7m: set CFSR.UNDEFINSTR on undefined instructionsMichael Davidsaver1-0/+1
2017-01-27armv7m: honour CCR.STACKALIGN on exception entryMichael Davidsaver1-4/+2
2017-01-27armv7m: add state for v7M CCR, CFSR, HFSR, DFSR, MMFAR, BFARPeter Maydell3-2/+69
2017-01-27target/arm: Drop IS_M() macroPeter Maydell3-8/+2
2017-01-27armv7m: Clear FAULTMASK on return from non-NMI exceptionsMichael Davidsaver1-1/+6
2017-01-27armv7m: Fix reads of CONTROL register bit 1Michael Davidsaver4-17/+32
2017-01-27armv7m: Explicit error for bad vector tableMichael Davidsaver1-1/+25
2017-01-27armv7m: Replace armv7m.hack with unassigned_access handlerMichael Davidsaver2-6/+34
2017-01-27armv7m: MRS/MSR: handle unprivileged accessMichael Davidsaver1-42/+37
2017-01-24migration: extend VMStateInfoJianjun Duan1-4/+10
2017-01-20Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell1-1/+1
2017-01-20target-arm: Enable EL2 feature bit on A53 and A57Peter Maydell3-0/+16
2017-01-20target/arm/psci.c: If EL2 implemented, start CPUs in EL2Peter Maydell1-7/+18
2017-01-20target-arm: Add ARMCPU fields for GIC CPU i/f configPeter Maydell2-0/+11
2017-01-20target-arm: Expose output GPIO line for VCPU maintenance interruptPeter Maydell2-0/+5
2017-01-20target/arm: Implement DBGVCR32_EL2 system registerPeter Maydell1-0/+7
generated by cgit v1.2.1 (git 2.18.0) at 2024-07-01 10:04:21 +0000