peter/qemu - QEMU hacking for Peter

Age	Commit message (Collapse)	Author	Files	Lines
2018-01-31	target/hppa: Implement PROBE for system mode	Richard Henderson	1	-2/+1
	Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-31	target/hppa: Implement halt and reset instructions	Helge Deller	1	-0/+2
	Real hardware would use an external device to control the power. But for the moment let's invent instructions in reserved space, to be used by our custom firmware. Signed-off-by: Helge Deller <deller@gmx.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30	target/hppa: Implement LPA	Richard Henderson	1	-0/+1
	Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30	target/hppa: Implement PTLB and PTLBE insns	Richard Henderson	1	-0/+2
	We now have all of the TLB manipulation instructions. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30	target/hppa: Implement ITLBA and ITLBP insns	Richard Henderson	1	-0/+2
	The TLB can now be populated, but it cannot yet be cleared. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30	target/hppa: Implement the interval timer	Richard Henderson	1	-0/+3
	Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30	target/hppa: Implement external interrupts	Richard Henderson	1	-0/+2
	Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30	target/hppa: Implement rfi	Richard Henderson	1	-0/+2
	Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30	target/hppa: Implement the system mask instructions	Richard Henderson	1	-0/+4
	Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-01-30	target/hppa: Split address size from register size	Richard Henderson	1	-8/+18
	For system mode, we will need 64-bit virtual addresses even when we have 32-bit register sizes. Since the rest of QEMU equates TARGET_LONG_BITS with the address size, redefine everything related to register size in terms of a new TARGET_REGISTER_BITS. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2017-10-24	target/hppa: check CF_PARALLEL instead of parallel_cpus	Emilio G. Cota	1	-0/+2
	Thereby decoupling the resulting translated code from the current state of the system. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2017-01-23	target-hppa: Implement floating-point insns	Richard Henderson	1	-0/+55
	Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-23	target-hppa: Implement system and memory-management insns	Richard Henderson	1	-0/+3
	Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-23	target-hppa: Implement loads and stores	Richard Henderson	1	-0/+3
	Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-23	target-hppa: Implement basic arithmetic	Richard Henderson	1	-0/+2
	Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-23	target-hppa: Add framework and enable compilation	Richard Henderson	1	-0/+3
	This is just about the minimum required to enable compilation without actually executing any instructions. This contains the HPPACPU structure and the required callbacks, the gdbstub, the basic translation loop, and a translate_one function that always results in an illegal instruction. Signed-off-by: Richard Henderson <rth@twiddle.net>