peter/qemu - QEMU hacking for Peter

Age	Commit message (Expand)	Author	Files	Lines
2017-10-24	tcg: Initialize cpu_env generically	Richard Henderson	1	-5/+0
2017-10-24	tcg: define tcg_init_ctx and make tcg_ctx a pointer	Emilio G. Cota	1	-1/+1
2017-10-24	target/m68k: check CF_PARALLEL instead of parallel_cpus	Emilio G. Cota	1	-2/+10
2017-10-24	tcg: convert tb->cflags reads to tb_cflags(tb)	Emilio G. Cota	1	-3/+3
2017-10-24	tcg: Remove TCGV_EQUAL*	Richard Henderson	1	-1/+1
2017-09-06	target: [tcg] Use a generic enum for DISAS_ values	Lluís Vilanova	1	-1/+6
2017-07-31	m68k/translate: fix incorrect copy/paste	Philippe Mathieu-Daudé	1	-1/+1
2017-07-19	tcg: Pass generic CPUState to gen_intermediate_code()	Lluís Vilanova	1	-3/+2
2017-07-19	target/m68k: optimize bcd_flags() using extract op	Philippe Mathieu-Daudé	1	-2/+1
2017-06-29	target/m68k: add fmovem	Laurent Vivier	1	-30/+63
2017-06-29	target/m68k: add explicit single and double precision operations (part 2)	Laurent Vivier	1	-4/+22
2017-06-29	target/m68k: add fsglmul and fsgldiv	Laurent Vivier	1	-0/+6
2017-06-29	target/m68k: add explicit single and double precision operations	Laurent Vivier	1	-5/+35
2017-06-29	target/m68k: add fmovecr	Laurent Vivier	1	-1/+12
2017-06-29	target/m68k: add fscc.	Laurent Vivier	1	-79/+131
2017-06-21	target-m68k: add FPCR and FPSR	Laurent Vivier	1	-91/+260
2017-06-21	target-m68k: use floatx80 internally	Laurent Vivier	1	-227/+419
2017-06-21	target-m68k: move fmove CR to a function	Laurent Vivier	1	-25/+31
2017-06-15	target-m68k: define ext_opsize	Laurent Vivier	1	-19/+24
2017-06-15	target/m68k: fix V flag for CC_OP_SUBx	Laurent Vivier	1	-1/+1
2017-06-07	target/m68k: implement rtd	Laurent Vivier	1	-0/+11
2017-01-14	target-m68k: increment/decrement with SP	Laurent Vivier	1	-2/+12
2017-01-14	target-m68k: CAS doesn't need aligned access	Laurent Vivier	1	-1/+0
2017-01-14	target-m68k: manage pre-dec et post-inc in CAS	Laurent Vivier	1	-0/+9
2017-01-14	target-m68k: fix gen_flush_flags()	Laurent Vivier	1	-1/+2
2017-01-14	target-m68k: fix bit operation with immediate value	Laurent Vivier	1	-3/+10
2017-01-14	target-m68k: Implement bfffo	Richard Henderson	1	-1/+38
2017-01-14	target-m68k: Implement bitfield ops for memory	Richard Henderson	1	-2/+140
2017-01-14	target-m68k: Implement bitfield ops for registers	Richard Henderson	1	-0/+210
2016-12-27	target-m68k: free TCG variables that are not	Laurent Vivier	1	-9/+32
2016-12-27	target-m68k: add rol/ror/roxl/roxr instructions	Laurent Vivier	1	-0/+391
2016-12-27	target-m68k: Inline shifts	Richard Henderson	1	-25/+201
2016-12-27	target-m68k: Do not cpu_abort on undefined insns	Richard Henderson	1	-3/+5
2016-12-27	target-m68k: Implement 680x0 movem	Laurent Vivier	1	-23/+107
2016-12-27	target-m68k: add cas/cas2 ops	Laurent Vivier	1	-0/+154
2016-12-27	target-m68k: add abcd/sbcd/nbcd	Laurent Vivier	1	-0/+220
2016-12-27	target-m68k: add 680x0 divu/divs variants	Laurent Vivier	1	-37/+47
2016-12-27	target-m68k: add 64bit mull	Laurent Vivier	1	-12/+50
2016-12-27	target-m68k: add cmpm	Laurent Vivier	1	-0/+16
2016-12-27	target-m68k: Split gen_lea and gen_ea	Richard Henderson	1	-53/+59
2016-12-27	target-m68k: Delay autoinc writeback	Richard Henderson	1	-20/+64
2016-12-20	Move target-* CPU file into a target/ folder	Thomas Huth	1	-0/+3595