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path: root/target/ppc/helper.h
AgeCommit message (Expand)AuthorFilesLines
2018-01-20target/ppc: add support for hypervisor doorbells on book3s CPUsCédric Le Goater1-0/+2
2017-04-26target/ppc: Flush TLB on write to PIDRSuraj Jitindar Singh1-0/+1
2017-02-22target-ppc: Add xscvqpudz and xscvqpuwz instructionsBharata B Rao1-0/+2
2017-02-22target-ppc: add slbieg instructionNikunj A Dadhania1-0/+1
2017-02-22target-ppc: Add xsmaxjdp and xsminjdp instructionsBharata B Rao1-0/+2
2017-02-22target-ppc: Add xsmaxcdp and xsmincdp instructionsBharata B Rao1-0/+2
2017-02-22ppc: implement xssubqp instructionJose Ricardo Ziviani1-0/+1
2017-02-22ppc: implement xssqrtqp instructionJose Ricardo Ziviani1-0/+1
2017-02-22ppc: implement xsrqpxp instructionJose Ricardo Ziviani1-0/+1
2017-02-22ppc: implement xsrqpi[x] instructionJose Ricardo Ziviani1-0/+1
2017-02-02target-ppc: Add xststdc[sp, dp, qp] instructionsNikunj A Dadhania1-0/+3
2017-02-02target-ppc: Add xvtstdc[sp,dp] instructionsNikunj A Dadhania1-0/+2
2017-01-31target-ppc: Add xvcv[hpsp, sphp] instructionsNikunj A Dadhania1-0/+2
2017-01-31target-ppc: Add xsmulqp instructionBharata B Rao1-0/+1
2017-01-31target-ppc: Add xsdivqp instructionBharata B Rao1-0/+1
2017-01-31target-ppc: Add xscvsdqp and xscvudqp instructionsBharata B Rao1-0/+2
2017-01-31ppc: Implement bcdutrunc. instructionJose Ricardo Ziviani1-0/+1
2017-01-31ppc: Implement bcdtrunc. instructionJose Ricardo Ziviani1-0/+1
2017-01-31target-ppc: Add xscvqps[d,w]z instructionsBharata B Rao1-0/+2
2017-01-31target-ppc: Add xvxsigsp instructionNikunj A Dadhania1-0/+1
2017-01-31ppc: Implement bcdsr. instructionJose Ricardo Ziviani1-0/+1
2017-01-31ppc: Implement bcdus. instructionJose Ricardo Ziviani1-0/+1
2017-01-31ppc: Implement bcds. instructionJose Ricardo Ziviani1-0/+1
2017-01-31target-ppc: Add xscvqpdp instructionBharata B Rao1-0/+1
2017-01-31target-ppc: Add xscvdpqp instructionBharata B Rao1-0/+1
2017-01-31target-ppc: Add xsaddqp instructionsBharata B Rao1-0/+1
2017-01-31target-ppc: Add xscvdphp, xscvhpdpBharata B Rao1-0/+2
2017-01-31target-ppc: Rename helper_compute_fprf to helper_compute_fprf_float64Bharata B Rao1-1/+1
2017-01-31target-ppc: Add xxinsertw instructionNikunj A Dadhania1-0/+1
2017-01-31target-ppc: Add xxextractuw instructionNikunj A Dadhania1-0/+1
2017-01-31target-ppc: implement stxvll instructionsNikunj A Dadhania1-0/+1
2017-01-31target-ppc: implement stxvl instructionNikunj A Dadhania1-0/+1
2017-01-31target-ppc: implement lxvll instructionNikunj A Dadhania1-0/+1
2017-01-31target-ppc: implement lxvl instructionNikunj A Dadhania1-0/+3
2017-01-31target-ppc: Add xxperm and xxpermr instructionsBharata B Rao1-0/+2
2017-01-31target-ppc: add vextu[bhw][lr]x instructionsAvinesh Kumar1-0/+6
2017-01-31target-ppc: Implement bcdsetsgn. instructionJose Ricardo Ziviani1-0/+1
2017-01-31target-ppc: Implement bcdcpsgn. instructionJose Ricardo Ziviani1-0/+1
2017-01-31target-ppc: Implement bcdctsq. instructionJose Ricardo Ziviani1-0/+1
2017-01-31target-ppc: Implement bcdcfsq. instructionJose Ricardo Ziviani1-0/+1
2017-01-31target-ppc: Add xscmpoqp and xscmpuqp instructionsBharata B Rao1-0/+2
2017-01-31target-ppc: Add xscmpexp[dp,qp] instructionsBharata B Rao1-0/+2
2017-01-10target-ppc: Use ctpop helperRichard Henderson1-2/+1
2017-01-10target-ppc: Use clz and ctz opcodesRichard Henderson1-4/+0
2016-12-20Move target-* CPU file into a target/ folderThomas Huth1-0/+742
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