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2018-02-09s390x/tcg: wire up pci instructionsCornelia Huck1-0/+9
On s390x, pci support is implemented via a set of instructions (no mmio). Unfortunately, none of them are documented in the PoP; the code is based upon the existing implementation for KVM and the Linux zpci driver. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2018-02-09s390x/tcg: implement TEST PENDING INTERRUPTIONDavid Hildenbrand1-0/+1
Use s390_cpu_virt_mem_write() so we can actually revert what we did (re-inject the dequeued IO interrupt). Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20180129125623.21729-10-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2018-01-22s390x/tcg: fixup TEST PROTECTIONDavid Hildenbrand1-1/+1
CC == 2 can only happen due to a protection exception, not if memory is not available (PGM_ADDRESSING). So all PGM_ADDRESSING exceptions have to be forwarded to the guest. Since the initial definition of TEST PROTECTION, we now read globals (e.g. PSW mask), so we have to correctly mark the instruction (otherwise, e.g. booting fedora 27 fails). Also, the architecture explicitly specifies which exceptions are forwarded to the guest, this makes the code a little nicer. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20180112125452.8569-1-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2018-01-22s390x/tcg: implement TEST PROTECTIONDavid Hildenbrand1-1/+1
Linux uses TEST PROTECTION to sense for available memory locations. Let's implement what we can for now (just as for the other instructions, excluding AR mode and special protection mechanisms). Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20171218224616.21030-2-david@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-12-14s390x/tcg: implement extract-CPU-time facilityDavid Hildenbrand1-1/+1
It only provides the EXTRACT CPU TIME instruction. We can reuse the stpt helper, which calculates the CPU timer value. As the instruction is not privileged, but we don't have a CPU timer value in case of linux user, we simply reuse cpu_get_host_ticks() to produce some descending value. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20171208160207.26494-13-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-12-14s390x/tcg: wire up SET CHANNEL MONITORDavid Hildenbrand1-0/+1
Let's just wire it up like KVM. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20171208160207.26494-10-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-12-14s390x/tcg: wire up SET ADDRESS LIMITDavid Hildenbrand1-0/+1
Let's handle it just like KVM: Depending on the model, this instruction may not be provided. When this instruction is not provided, it is checked for operand exception and privileged-opera- tion exception, and then is suppressed. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20171208160207.26494-9-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-12-14s390x/tcg: wire up STORE CHANNEL REPORT WORDDavid Hildenbrand1-0/+1
CRW machine check handling requires STCRW. So let's wire it up. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20171208160207.26494-6-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-12-14s390x/tcg: implement SET CLOCK PROGRAMMABLE FIELDDavid Hildenbrand1-0/+1
Needed for machine check handling inside Linux (when restoring registers). Except for SIGP and machine checks, we don't make use of the register yet. Sufficient for now. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20171208160207.26494-4-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-24target/s390x: check CF_PARALLEL instead of parallel_cpusEmilio G. Cota1-0/+4
Thereby decoupling the resulting translated code from the current state of the system. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2017-10-20s390x/tcg: switch to new SIGP handling codeDavid Hildenbrand1-1/+1
This effectively enables experimental SMP support. Floating interrupts are still a mess, so allow it but print a big warning. There also seems to be a problem with CPU hotplug (after the main loop started). Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-27-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [CH: changed insn-data.def as pointed out by Richard] Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-06s390x/tcg: make STFL store into the lowcoreDavid Hildenbrand1-1/+1
Using virtual memory access is wrong and will soon include low-address protection checks, which is to be bypassed for STFL. STFL is a privileged instruction and using LowCore requires !CONFIG_USER_ONLY, so add the ifdef and move the declaration to the right place. This was originally part of a bigger STFL(E) refactoring. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170927170027.8539-4-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-06s390x/tcg: add basic MSA featuresDavid Hildenbrand1-0/+1
The STFLE bits for the MSA (extension) facilities simply indicate that the respective instructions can be executed. The QUERY subfunction can then be used to identify which features exactly are available. Availability of subfunctions can also vary on real hardware. For now, we simply implement a CPU model without any available subfunctions except QUERY (which is always around). As all MSA functions behave quite similarly, we can use one translation handler for now. Prepare the code for implementation of actual subfunctions. At least MSA is helpful for now, as older Linux kernels require this facility when compiled for a z9 model. Allow to enable the facilities for the qemu cpu model. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170920153016.3858-4-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-07-17target/s390x: Implement TRTRRichard Henderson1-0/+1
Drop TRT from the set of insns handled internally by EXECUTE. It's more important to adjust the existing helper to handle both TRT and TRTR. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-07-17target/s390x: Implement SRSTURichard Henderson1-0/+1
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-07-17target/s390x: Tidy SRSTRichard Henderson1-1/+1
Since we require all registers saved on input, read R0 from ENV instead of passing it manually. Recognize the specification exception when R0 contains incorrect data. Keep high bits of result registers unmodified when in 31 or 24-bit mode. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-07-17target/s390x: Implement CONVERT UNICODE insnsRichard Henderson1-0/+6
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-07-17target/s390x: Implement CSSTRichard Henderson1-0/+1
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-23target/s390x: Implement idte instructionDavid Hildenbrand1-0/+1
Let's keep it very simple for now and flush the complete tlb, we currently can't find the right entries in our tlb, we would have to store the used tables for each element. As we now fully implement the DAT-enhancement facility, we can allow to enable it for the qemu CPU model. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170622094151.28633-4-david@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-23target/s390x: implement mvcos instructionDavid Hildenbrand1-0/+1
This adds support for the MOVE WITH OPTIONAL SPECIFICATIONS (MVCOS) instruction. Allow to enable it for the qemu cpu model using qemu-system-s390x ... -cpu qemu,mvcos=on ... This allows to boot linux kernel that uses it for uacccess. We are missing (as for most other part) low address protection checks, PSW key / storage key checks and support for AR-mode. We fake an ADDRESSING exception when called from problem state (which seems to rely on PSW key checks to be in place) and if AR-mode is used. user mode will always see a PRIVILEDGED exception. This patch is based on an original patch by Miroslav Benes (thanks!). Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170614133819.18480-3-david@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement STORE PAIR TO QUADWORDAurelien Jarno1-0/+1
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170604202034.16615-3-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement LOAD PAIR FROM QUADWORDAurelien Jarno1-0/+1
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170604202034.16615-2-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement TRANSLATE ONE/TWO TO ONE/TWOAurelien Jarno1-0/+1
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-29-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement TEST DECIMALAurelien Jarno1-0/+1
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-28-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement UNPACK UNICODEAurelien Jarno1-0/+1
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-27-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement UNPACK ASCIIAurelien Jarno1-0/+1
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-26-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement PACK UNICODEAurelien Jarno1-0/+1
Use a common helper with PACK ASCII as the differences are limited to the stride of the source operand. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-25-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement PACK ASCIIAurelien Jarno1-0/+1
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-24-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement MOVE LONG UNICODEAurelien Jarno1-0/+1
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-23-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement COMPARE LOGICAL LONG UNICODEAurelien Jarno1-0/+1
For that we need to make program_interrupt available to qemu-user. Fortunately there is almost nothing to change as both kvm_enabled and CONFIG_KVM evaluate to false in that case. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-22-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement COMPARE LOGICAL LONGAurelien Jarno1-0/+1
As CLCL and CLCLE mostly differ by their operands, use a common do_clcl helper. Another difference is that CLCL is not interruptible. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-19-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement MOVE ZONESAurelien Jarno1-0/+1
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-14-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement MOVE WITH OFFSETAurelien Jarno1-0/+1
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-13-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement MOVE NUMERICSAurelien Jarno1-0/+1
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-12-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement MOVE INVERSEAurelien Jarno1-0/+1
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-11-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement COMPARE AND SIGNALAurelien Jarno1-0/+3
These functions differ from COMPARE by generating an exception for a QNaN input. Use the non quiet version of floatXX_compare. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-10-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement PACKAurelien Jarno1-0/+1
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-7-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement local-TLB-clearing in IPTEAurelien Jarno1-1/+1
And at the same time make IPTE SMP aware. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-4-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: Use atomic operations for COMPARE SWAP PURGERichard Henderson1-1/+1
Also provide the cross-cpu tlb flushing required by the PoO. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: Fix some helper_ex problemsRichard Henderson1-1/+1
(1) The OR of the low bits or R1 into INSN were not being done consistently; it was forgotten along all but the SVC path. (2) The setting of ILEN was wrong on SVC path for EXRL. (3) The data load for ICM read too much. Fix these by consolidating data load at the beginning, using get_ilen to control the number of bytes loaded, and ORing in the byte from R1. Use extract64 from the full aligned insn to extract arguments. Pass in ILEN rather than RET as the more natural way to give the required data along the SVC path. Modify ENV->CC_OP directly rather than include it in the functional interface. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: Use unwind data for helper_mvpgRichard Henderson1-1/+1
Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: Add support for the TEST BLOCK instructionThomas Huth1-0/+1
TEST BLOCK was likely once used to execute basic memory tests, but nowadays it's just a (slow) way to clear a page. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <1495128400-23759-1-git-send-email-thuth@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-05-12target/s390x: Use atomic operations for COMPARE SWAPRichard Henderson1-0/+1
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-05-12target/s390x: Implement STORE FACILITIES LIST EXTENDEDRichard Henderson1-0/+2
At the same time, improve STORE FACILITIES LIST so that we don't hard-code the list for all cpus. Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-10target-s390x: Use clz opcodeRichard Henderson1-1/+0
Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-12-20Move target-* CPU file into a target/ folderThomas Huth1-0/+133
We've currently got 18 architectures in QEMU, and thus 18 target-xxx folders in the root folder of the QEMU source tree. More architectures (e.g. RISC-V, AVR) are likely to be included soon, too, so the main folder of the QEMU sources slowly gets quite overcrowded with the target-xxx folders. To disburden the main folder a little bit, let's move the target-xxx folders into a dedicated target/ folder, so that target-xxx/ simply becomes target/xxx/ instead. Acked-by: Laurent Vivier <laurent@vivier.eu> [m68k part] Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> [tricore part] Acked-by: Michael Walle <michael@walle.cc> [lm32 part] Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> [s390x part] Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> [s390x part] Acked-by: Eduardo Habkost <ehabkost@redhat.com> [i386 part] Acked-by: Artyom Tarasenko <atar4qemu@gmail.com> [sparc part] Acked-by: Richard Henderson <rth@twiddle.net> [alpha part] Acked-by: Max Filippov <jcmvbkbc@gmail.com> [xtensa part] Reviewed-by: David Gibson <david@gibson.dropbear.id.au> [ppc part] Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> [cris&microblaze part] Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> [unicore32 part] Signed-off-by: Thomas Huth <thuth@redhat.com>