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2017-12-14target/s390x: nuke DPRINTF in helper.cCornelia Huck1-18/+0
It is not used anywhere. Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-12-14s390x/migration: use zero flag parameterChristian Borntraeger1-8/+8
valgrind pointed out that we call KVM_S390_GET_IRQ_STATE with an undefined value for flags. Kernels prior to 4.15 did not use that field, and later kernels ignore it for compatibility reasons, but we better play safe. The same is true for SET_IRQ_STATE. We should make sure to not use the flag field, either. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Message-Id: <20171122142627.73170-2-borntraeger@de.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-11-20s390x/tcg: fix DIAG 308 with > 1 VCPU (MTTCG)David Hildenbrand1-0/+2
Currently, multi threaded TCG with > 1 VCPU gets stuck during IPL, when the bios tries to switch to the loaded kernel via DIAG 308. As run_on_cpu() is used, we run into a deadlock after handling the reset. We need the iolock (just like KVM). Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20171116170526.12643-4-david@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-11-20s390x: fix storing CPU status (again)David Hildenbrand1-1/+1
Looks like the last fix + cleanup introduced another bug. (for now Linux guests don't seem to care) - we store the crs into ars. Fixes: 947a38bd6f13 ("s390x/kvm: fix and cleanup storing CPU status") Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20171116170526.12643-2-david@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-11-09target/s390x: Finish implementing RISBGNRichard Henderson1-6/+3
We added the entry to insn-data.def, but failed to update op_risbg to match. No need to special-case the imask inversion, since that is already ~0 for RISBG (and now RISBGN). Fixes: 375ee58bedcda359011fe7fa99e0647f66f9ffa0 Fixes: https://bugs.launchpad.net/qemu/+bug/1701798 (s390x part) Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20171107145546.767-1-richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Tested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-30s390x/kvm: use cpu model for gscb on compat machinesChristian Borntraeger2-2/+2
Starting a guest with <os> <type arch='s390x' machine='s390-ccw-virtio-2.9'>hvm</type> </os> <cpu mode='host-model'/> on an IBM z14 results in "qemu-system-s390x: Some features requested in the CPU model are not available in the configuration: gs" This is because guarded storage is fenced for compat machines that did not have guarded storage support. While this prevents future migration abort (by not starting the guest at all), not being able to start a "host-model" guest is very much unexpected. As it turns out, even if we would modify libvirt to not expand the cpu model to contain "gs" for compat machines, it cannot guarantee that a migration will succeed. For example if the kernel changes its features (or the user has nested=1 on one host but not on the other) the migration will fail nevertheless. So instead of fencing "gs" for machines <= 2.9 lets allow it for all machine types that support the CPU model. This will make "host-model" runnable all the time, while relying on the CPU model to reject invalid migration attempts. We also need to change the migration for guarded storage. Additional discussions about host-model are still pending but are out of scope of this patch. Suggested-by: David Hildenbrand <david@redhat.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Acked-by: David Hildenbrand <david@redhat.com> Acked-by: Cornelia Huck <Cornelia Huck <cohuck@redhat.com> Acked-by: Halil Pasic <pasic@linux.vnet.ibm.com>
2017-10-30target/s390x: change CPU type name to "s390x-cpu"David Hildenbrand2-3/+3
For now, e.g. host-s390-cpu wasn't exposed to the user. cpu-add, -cpu and the CPU model qmp interfaces didn't care about the actual type, as that information was hidden. This changed with CPU hotplug via device_add. Now the type is visible to the user. Before we get that supported in a stable version, this is our last chance to change it. So change it from "s390-cpu" to "s390x-cpu", to match the architecture name. Example names are then e.g. z14-s390x-cpu or qemu-s390x-cpu. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20171020115803.14093-1-david@redhat.com> Acked-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2017-10-27Merge remote-tracking branch 'remotes/rth/tags/pull-dis-20171026' into stagingPeter Maydell1-1/+1
Capstone disassembler # gpg: Signature made Thu 26 Oct 2017 10:57:27 BST # gpg: using RSA key 0x64DF38E8AF7E215F # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-dis-20171026: disas: Add capstone as submodule disas: Remove monitor_disas_is_physical ppc: Support Capstone in disas_set_info arm: Support Capstone in disas_set_info i386: Support Capstone in disas_set_info disas: Support the Capstone disassembler library disas: Remove unused flags arguments target/arm: Don't set INSN_ARM_BE32 for CONFIG_USER_ONLY target/arm: Move BE32 disassembler fixup target/ppc: Convert to disas_set_info hook target/i386: Convert to disas_set_info hook Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # target/i386/cpu.c # target/ppc/translate_init.c
2017-10-26tcg: Avoid setting tcg_initialize if !CONFIG_TCGRichard Henderson1-0/+2
Fix the build for --disable-tcg. Fixes: 55c3ceef61fcf06fc98ddc752b7cce788ce7680b Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Message-id: 20171026135814.20773-1-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-10-25disas: Remove unused flags argumentsRichard Henderson1-1/+1
Now that every target is using the disas_set_info hook, the flags argument is unused. Remove it. Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2017-10-24tcg: Initialize cpu_env genericallyRichard Henderson1-6/+0
This is identical for each target. So, move the initialization to common code. Move the variable itself out of tcg_ctx and name it cpu_env to minimize changes within targets. This also means we can remove tcg_global_reg_new_{ptr,i32,i64}, since there are no longer global-register temps created by targets. Reviewed-by: Emilio G. Cota <cota@braap.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2017-10-24tcg: define tcg_init_ctx and make tcg_ctx a pointerEmilio G. Cota1-1/+1
Groundwork for supporting multiple TCG contexts. The core of this patch is this change to tcg/tcg.h: > -extern TCGContext tcg_ctx; > +extern TCGContext tcg_init_ctx; > +extern TCGContext *tcg_ctx; Note that for now we set *tcg_ctx to whatever TCGContext is passed to tcg_context_init -- in this case &tcg_init_ctx. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2017-10-24target/s390x: check CF_PARALLEL instead of parallel_cpusEmilio G. Cota3-22/+88
Thereby decoupling the resulting translated code from the current state of the system. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2017-10-24tcg: convert tb->cflags reads to tb_cflags(tb)Emilio G. Cota1-4/+4
Convert all existing readers of tb->cflags to tb_cflags, so that we use atomic_read and therefore avoid undefined behaviour in C11. Note that the remaining setters/getters of the field are protected by tb_lock, and therefore do not need conversion. Luckily all readers access the field via 'tb->cflags' (so no foo.cflags, bar->cflags in the code base), which makes the conversion easily scriptable: FILES=$(git grep 'tb->cflags' target include/exec/gen-icount.h \ accel/tcg/translator.c | cut -f1 -d':' | sort | uniq) perl -pi -e 's/([^.>])tb->cflags/$1tb_cflags(tb)/g' $FILES perl -pi -e 's/([a-z->.]*)(->|\.)tb->cflags/tb_cflags($1$2tb)/g' $FILES Then manually fixed the few errors that checkpatch reported. Compile-tested for all targets. Suggested-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2017-10-24qom: Introduce CPUClass.tcg_initializeRichard Henderson1-6/+1
Move target cpu tcg initialization to common code, called from cpu_exec_realizefn. Acked-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Emilio G. Cota <cota@braap.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2017-10-20s390x/tcg: low-address protection supportDavid Hildenbrand3-45/+62
This is a neat way to implement low address protection, whereby only the first 512 bytes of the first two pages (each 4096 bytes) of every address space are protected. Store a tec of 0 for the access exception, this is what is defined by Enhanced Suppression on Protection in case of a low address protection (Bit 61 set to 0, rest undefined). We have to make sure to to pass the access address, not the masked page address into mmu_translate*(). Drop the check from testblock. So we can properly test this via kvm-unit-tests. This will check every access going through one of the MMUs. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20171016202358.3633-3-david@redhat.com> [CH: restored error message for access register mode] Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x: refactor error handling for MSCH handlerHalil Pasic1-19/+4
Simplify the error handling of the MSCH. Let the code detecting the condition tell (in a less ambiguous way) how it's to be handled. No changes in behavior. Signed-off-by: Halil Pasic <pasic@linux.vnet.ibm.com> Message-Id: <20171017140453.51099-8-pasic@linux.vnet.ibm.com> [CH: fix return code for fctl != 0] Reviewed-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x: refactor error handling for HSCH handlerHalil Pasic1-19/+4
Simplify the error handling of the HSCH. Let the code detecting the condition tell (in a less ambiguous way) how it's to be handled. No changes in behavior. Signed-off-by: Halil Pasic <pasic@linux.vnet.ibm.com> Message-Id: <20171017140453.51099-7-pasic@linux.vnet.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x: refactor error handling for CSCH handlerHalil Pasic1-10/+4
Simplify the error handling of the CSCH. Let the code detecting the condition tell (in a less ambiguous way) how it's to be handled. No changes in behavior. Signed-off-by: Halil Pasic <pasic@linux.vnet.ibm.com> Message-Id: <20171017140453.51099-6-pasic@linux.vnet.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x: refactor error handling for XSCH handlerHalil Pasic1-19/+4
Simplify the error handling of the XSCH. Let the code detecting the condition tell (in a less ambiguous way) how it's to be handled. No changes in behavior. Signed-off-by: Halil Pasic <pasic@linux.vnet.ibm.com> Message-Id: <20171017140453.51099-5-pasic@linux.vnet.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x: improve error handling for SSCH and RSCHHalil Pasic1-46/+7
Simplify the error handling of the SSCH and RSCH handler avoiding arbitrary and cryptic error codes being used to tell how the instruction is supposed to end. Let the code detecting the condition tell how it's to be handled in a less ambiguous way. It's best to handle SSCH and RSCH in one go as the emulation of the two shares a lot of code. For passthrough this change isn't pure refactoring, but changes the way kernel reported EFAULT is handled. After clarifying the kernel interface we decided that EFAULT shall be mapped to unit exception. Same goes for unexpected error codes and absence of required ORB flags. Signed-off-by: Halil Pasic <pasic@linux.vnet.ibm.com> Message-Id: <20171017140453.51099-4-pasic@linux.vnet.ibm.com> Tested-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com> [CH: cosmetic changes] Reviewed-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x: move s390x_new_cpu() into board codeIgor Mammedov2-21/+0
s390-virtio-ccw.c is the sole user of s390x_new_cpu(), so move this helper there. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <1508253203-119237-1-git-send-email-imammedo@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x: fix cpu object referrence leak in s390x_new_cpu()Igor Mammedov1-1/+1
object_new() returns cpu with refcnt == 1 and after realize refcnt == 2*. s390x_new_cpu() as an owner of the first refcnt should have released it on exit in both cases (on error and success) to avoid it leaking. Do so for both cases. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <1508247680-98800-2-git-send-email-imammedo@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20target/s390x: special handling when starting a CPU with WAIT PSWDavid Hildenbrand2-3/+14
When we try to start a CPU with a WAIT PSW, we have to take care that TCG will actually try to continue executing instructions. We must therefore really only unhalt the CPU if we don't have a WAIT PSW. Also document the special order for restart interrupts, which load a new PSW and change the state to operating. To keep KVM working, simply don't have a look at the WAIT bit when loading the PSW. Otherwise the behavior of a restart interrupt when a CPU stopped would be changed. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-31-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/tcg: refactor stfl(e) to use s390_get_feat_block()David Hildenbrand2-39/+29
Refactor it to use s390_get_feat_block(). Directly write into the mapped lowcore with stfl and make sure it is really only compiled if needed. While at it, add an alignment check for STFLE and avoid potential_page_fault() by properly restoring the CPU state. Due to s390_get_feat_block(), we will now also indicate the "Configuration-z-architectural-mode", which is with new SIGP code the right thing to do. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-30-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/tcg: unlock NMIDavid Hildenbrand1-5/+0
Nothing hindering us anymore from unlocking the restart code (used for NMI). Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-29-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/cpumodel: allow to enable SENSE RUNNING STATUS for qemuDavid Hildenbrand1-0/+1
As we properly implement it, allow to enable it. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-28-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/tcg: switch to new SIGP handling codeDavid Hildenbrand4-40/+11
This effectively enables experimental SMP support. Floating interrupts are still a mess, so allow it but print a big warning. There also seems to be a problem with CPU hotplug (after the main loop started). Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-27-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [CH: changed insn-data.def as pointed out by Richard] Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/tcg: flush the tlb on SIGP SET PREFIXDavid Hildenbrand1-0/+1
Thanks to Aurelien Jarno for doing this in his prototype. We can flush the whole TLB as this should happen really rarely. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-26-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/tcg: implement STOP and RESET interrupts for TCGDavid Hildenbrand6-6/+51
Implement them like KVM implements/handles them. Both can only be triggered via SIGP instructions. RESET has (almost) the lowest priority if the CPU is running, and the highest if the CPU is STOPPED. This is handled in SIGP code already. On delivery, we only have to care about the "CPU running" scenario. STOP is defined to be delivered after all other interrupts have been delivered. Therefore it has the actual lowest priority. As both can wake up a CPU if sleeping, indicate them correctly to external code (e.g. cpu_has_work()). Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-25-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/tcg: implement SIGP CONDITIONAL EMERGENCY SIGNALDavid Hildenbrand2-0/+38
Mostly analogous to the kernel/KVM version (so I assume the checks are correct :) ). As a preparation for TCG. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-24-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/tcg: implement SIGP EMERGENCY SIGNALDavid Hildenbrand1-0/+15
As preparation for TCG. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-23-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/tcg: implement SIGP EXTERNAL CALLDavid Hildenbrand1-2/+23
As preparation for TCG. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-22-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/tcg: implement SIGP SENSEDavid Hildenbrand1-0/+29
Add it as preparation for TCG. Sensing could later be done completely lockless. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-21-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/tcg: implement SIGP SENSE RUNNING STATUSDavid Hildenbrand2-0/+27
Preparation for TCG, for KVM is this is completely handled in the kernel. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-20-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/kvm: factor out actual handling of STOP interruptsDavid Hildenbrand3-8/+16
For KVM, the KVM module decides when a STOP can be performed (when the STOP interrupt can be processed). Factor it out so we can use it later for TCG. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-19-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/kvm: factor out SIGP code into sigp.cDavid Hildenbrand9-359/+385
We want to use the same code base for TCG, so let's cleanly factor it out. The sigp mutex is currently not really needed, as everything is protected by the iothread mutex. But this could change later, so leave it in place and initialize it properly from common code. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-17-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/kvm: drop two debug printsDavid Hildenbrand1-2/+0
Preparation for moving it out of kvm.c. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-16-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/kvm: factor out storing of adtl CPU statusDavid Hildenbrand3-29/+31
Called from SIGP code to be factored out, so let's move it. Add a FIXME for TCG code in the future. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-15-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/kvm: factor out storing of CPU statusDavid Hildenbrand3-66/+65
Factor it out into s390_store_status(), to be used also by TCG later on. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-14-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/kvm: generalize SIGP stop and restart interrupt injectionDavid Hildenbrand5-12/+53
Preparation for factoring it out into !kvm code. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-13-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/kvm: pass ipb directly into handle_sigp()David Hildenbrand1-3/+3
No need to pass kvm_run. Pass parameters alphabetically ordered. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-12-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20target/s390x: interpret PSW_MASK_WAIT only for TCGDavid Hildenbrand1-1/+2
KVM handles the wait PSW itself and triggers a WAIT ICPT in case it really wants to sleep (disabled wait). This will later allow us to change the order of loading a restart interrupt and setting a CPU to OPERATING on SIGP RESTART without changing KVM behavior. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-11-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/tcg: handle WAIT PSWs during interrupt injectionDavid Hildenbrand1-0/+6
If we encounter a WAIT PSW, we have to halt immediately. Using cpu_loop_exit() at this point feels wrong. Simply leaving cs->exception_index set doesn't result in an immediate stop. This is also necessary to properly handle SIGP STOP interrupts later. The CPU_INTERRUPT_HALT will be processed immediately and properly set the CPU to halted (also resetting cs->exception_index to EXCP_HLT) Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-10-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20target/s390x: factor out handling of WAIT PSW into s390_handle_wait()David Hildenbrand3-19/+23
This will now also detect crashes under TCG. We can directly use cpu->env.psw.addr instead of kvm_run, as we do a cpu_synchronize_state(). Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-9-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/tcg: a CPU cannot switch state due to an interruptDavid Hildenbrand1-1/+0
Going to OPERATING here looks wrong. A CPU should even never be !OPERATING at this point. Unhalting will already be done in cpu_handle_halt() if there is work, so we can drop this statement completely. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-8-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/tcg: STOPPED cpus can never wake upDavid Hildenbrand1-0/+6
Interrupts can't wake such CPUs up. SIGP from other CPUs has to be used to toggle the state. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-7-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/tcg: take care of external interrupt subclassesDavid Hildenbrand4-13/+50
We can now let go of INTERRUPT_EXT. When cr0 changes, we have to revalidate if we now have a pending external interrupt, just like when the PSW (or SYSTEM MASK only) changes. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-6-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/tcg: rework checking for deliverable interruptsDavid Hildenbrand4-17/+62
Currently, enabling/disabling of interrupts is not really supported. Let's improve interrupt handling code by explicitly checking for deliverable interrupts only. This is the first step. Checking for external interrupt subclasses will be done next. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-5-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2017-10-20s390x/tcg: injection of emergency signals and external callsDavid Hildenbrand4-2/+50
Preparation for new TCG SIGP code. Especially also prepare for indicating that another external call is already pending. Take care of interrupt priority. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-4-david@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
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