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2017-09-19hyperv: add header with protocol definitionsRoman Kagan6-51/+306
The definitions for Hyper-V emulation are currently taken from a header imported from the Linux kernel. However, as these describe a third-party protocol rather than a kernel API, it probably wasn't a good idea to publish it in the kernel uapi. This patch introduces a header that provides all the necessary definitions, superseding the one coming from the kernel. The new header supports (temporary) coexistence with the kernel one. The constants explicitly named in the Hyper-V specification (e.g. msr numbers) are defined in a non-conflicting way. Other constants and types have got new names. While at this, the protocol data structures are defined in a more conventional way, without bitfields, enums, and excessive unions. The code using this stuff is adjusted, too; it can now be built both with and without the kernel header in the tree. Signed-off-by: Roman Kagan <rkagan@virtuozzo.com> Message-Id: <20170713201522.13765-2-rkagan@virtuozzo.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-09-19i386/cpu/hyperv: support over 64 vcpus for windows guestsGonglei3-1/+18
Starting with Windows Server 2012 and Windows 8, if CPUID.40000005.EAX contains a value of -1, Windows assumes specific limit to the number of VPs. In this case, Windows Server 2012 guest VMs may use more than 64 VPs, up to the maximum supported number of processors applicable to the specific Windows version being used. https://docs.microsoft.com/en-us/virtualization/hyper-v-on-windows/reference/tlfs For compatibility, Let's introduce a new property for X86CPU, named "x-hv-max-vps" as Eduardo's suggestion, and set it to 0x40 before machine 2.10. (The "x-" prefix indicates that the property is not supposed to be a stable user interface.) Signed-off-by: Gonglei <arei.gonglei@huawei.com> Message-Id: <1505143227-14324-1-git-send-email-arei.gonglei@huawei.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-09-19target/mips: Convert VM clock update prints to warn_reportAlistair Francis1-3/+3
Convert the fprintf() messages in kvm_mips_update_state() to use warn_report() as they aren't errors, but are just warnings. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Cc: James Hogan <james.hogan@imgtec.com> Message-Id: <e6acff8db6d264f913a18c86858b9aa600554e51.1505158760.git.alistair.francis@xilinx.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-09-19General warn report fixupsAlistair Francis2-5/+4
Tidy up some of the warn_report() messages after having converted them to use warn_report(). Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-Id: <9cb1d23551898c9c9a5f84da6773e99871285120.1505158760.git.alistair.francis@xilinx.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-09-19Convert multi-line fprintf() to warn_report()Alistair Francis3-18/+18
Convert all the multi-line uses of fprintf(stderr, "warning:"..."\n"... to use warn_report() instead. This helps standardise on a single method of printing warnings to the user. All of the warnings were changed using these commands: find ./* -type f -exec sed -i \ 'N; {s|fprintf(.*".*warning[,:] \(.*\)\\n"\(.*\));|warn_report("\1"\2);|Ig}' \ {} + find ./* -type f -exec sed -i \ 'N;N; {s|fprintf(.*".*warning[,:] \(.*\)\\n"\(.*\));|warn_report("\1"\2);|Ig}' \ {} + find ./* -type f -exec sed -i \ 'N;N;N; {s|fprintf(.*".*warning[,:] \(.*\)\\n"\(.*\));|warn_report("\1"\2);|Ig}' \ {} + find ./* -type f -exec sed -i \ 'N;N;N;N {s|fprintf(.*".*warning[,:] \(.*\)\\n"\(.*\));|warn_report("\1"\2);|Ig}' \ {} + find ./* -type f -exec sed -i \ 'N;N;N;N;N {s|fprintf(.*".*warning[,:] \(.*\)\\n"\(.*\));|warn_report("\1"\2);|Ig}' \ {} + find ./* -type f -exec sed -i \ 'N;N;N;N;N;N {s|fprintf(.*".*warning[,:] \(.*\)\\n"\(.*\));|warn_report("\1"\2);|Ig}' \ {} + find ./* -type f -exec sed -i \ 'N;N;N;N;N;N;N; {s|fprintf(.*".*warning[,:] \(.*\)\\n"\(.*\));|warn_report("\1"\2);|Ig}' \ {} + Indentation fixed up manually afterwards. Some of the lines were manually edited to reduce the line length to below 80 charecters. Some of the lines with newlines in the middle of the string were also manually edit to avoid checkpatch errrors. The #include lines were manually updated to allow the code to compile. Several of the warning messages can be improved after this patch, to keep this patch mechanical this has been moved into a later patch. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Kevin Wolf <kwolf@redhat.com> Cc: Max Reitz <mreitz@redhat.com> Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Stefano Stabellini <sstabellini@kernel.org> Cc: Anthony Perard <anthony.perard@citrix.com> Cc: Richard Henderson <rth@twiddle.net> Cc: Eduardo Habkost <ehabkost@redhat.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Yongbok Kim <yongbok.kim@imgtec.com> Cc: Cornelia Huck <cohuck@redhat.com> Cc: Christian Borntraeger <borntraeger@de.ibm.com> Cc: Alexander Graf <agraf@suse.de> Cc: Jason Wang <jasowang@redhat.com> Cc: David Gibson <david@gibson.dropbear.id.au> Cc: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-Id: <5def63849ca8f551630c6f2b45bcb1c482f765a6.1505158760.git.alistair.francis@xilinx.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-09-19Convert single line fprintf(.../n) to warn_report()Alistair Francis1-2/+2
Convert all the single line uses of fprintf(stderr, "warning:"..."\n"... to use warn_report() instead. This helps standardise on a single method of printing warnings to the user. All of the warnings were changed using this command: find ./* -type f -exec sed -i \ 's|fprintf(.*".*warning[,:] \(.*\)\\n"\(.*\));|warn_report("\1"\2);|Ig' \ {} + Some of the lines were manually edited to reduce the line length to below 80 charecters. The #include lines were manually updated to allow the code to compile. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Cc: Kevin Wolf <kwolf@redhat.com> Cc: Max Reitz <mreitz@redhat.com> Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Richard Henderson <rth@twiddle.net> Cc: Eduardo Habkost <ehabkost@redhat.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jason Wang <jasowang@redhat.com> Cc: Michael Roth <mdroth@linux.vnet.ibm.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Yongbok Kim <yongbok.kim@imgtec.com> Cc: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: James Hogan <james.hogan@imgtec.com> [mips] Message-Id: <ae8f8a7f0a88ded61743dff2adade21f8122a9e7.1505158760.git.alistair.francis@xilinx.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-09-19Convert remaining error_report() to warn_report()Alistair Francis1-2/+2
In a previous patch (3dc6f8693694a649a9c83f1e2746565b47683923) we converted uses of error_report("warning:"... to use warn_report() instead. This was to help standardise on a single method of printing warnings to the user. There appears to have been some cases that slipped through in patch sets applied around the same time, this patch catches the few remaining cases. All of the warnings were changed using this command: find ./* -type f -exec sed -i \ 's|error_report(".*warning[,:] |warn_report("|Ig' {} + Indentation fixed up manually afterwards. Two messages were manually fixed up as well. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Cc: Kevin Wolf <kwolf@redhat.com> Cc: Max Reitz <mreitz@redhat.com> Cc: Christian Borntraeger <borntraeger@de.ibm.com> Cc: Cornelia Huck <cohuck@redhat.com> Cc: Alexander Graf <agraf@suse.de> Cc: Richard Henderson <rth@twiddle.net> Cc: Stefan Hajnoczi <stefanha@redhat.com> Acked-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-Id: <eec8cba0d5434bd828639e5e45f12182490ff47d.1505158760.git.alistair.francis@xilinx.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-09-19i386/kvm: advertise Hyper-V frequency MSRsLadi Prosek1-1/+11
As of kernel commit eb82feea59d6 ("KVM: hyperv: support HV_X64_MSR_TSC_FREQUENCY and HV_X64_MSR_APIC_FREQUENCY"), KVM supports two new MSRs which are required for nested Hyper-V to read timestamps with RDTSC + TSC page. This commit makes QEMU advertise the MSRs with CPUID.40000003H:EAX[11] and CPUID.40000003H:EDX[8] as specified in the Hyper-V TLFS and experimentally verified on a Hyper-V host. The feature is enabled with the existing hv-time CPU flag, and only if the TSC frequency is stable across migrations and known. Signed-off-by: Ladi Prosek <lprosek@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Message-Id: <20170807085703.32267-5-lprosek@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-09-19i386/kvm: introduce tsc_is_stable_and_known()Ladi Prosek1-3/+10
Move the "is TSC stable and known" condition to a reusable helper. Signed-off-by: Ladi Prosek <lprosek@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Message-Id: <20170807085703.32267-4-lprosek@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-09-19i386/kvm: set tsc_khz before configuring Hyper-V CPUIDLadi Prosek1-19/+19
Timing-related Hyper-V enlightenments will benefit from knowing the final tsc_khz value. This commit just moves the code in preparation for further changes. Signed-off-by: Ladi Prosek <lprosek@redhat.com> Message-Id: <20170807085703.32267-3-lprosek@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-09-19i386/kvm: use a switch statement for MSR detectionLadi Prosek1-44/+31
Switch is easier on the eye and might lead to better codegen. Signed-off-by: Ladi Prosek <lprosek@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Message-Id: <20170807085703.32267-2-lprosek@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-09-19target/i386: fix phminposuw in-place operationJoseph Myers1-3/+3
The SSE4.1 phminposuw instruction finds the minimum 16-bit element in the source vector, putting the value of that element in the low 16 bits of the destination vector, the index of that element in the next three bits and zeroing the rest of the destination. The helper for this operation fills the destination from high to low, meaning that when the source and destination are the same register, the minimum source element can be overwritten before it is copied to the destination. This patch fixes it to fill the destination from low to high instead, so the minimum source element is always copied first. This fixes one gcc test failure in my GCC 6-based testing (and so concludes the present sequence of patches, as I don't have any further gcc test failures left in that testing that I attribute to QEMU bugs). Signed-off-by: Joseph Myers <joseph@codesourcery.com> Message-Id: <alpine.DEB.2.20.1708111422580.11919@digraph.polyomino.org.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-09-19target/i386: fix pcmpxstrx substring searchJoseph Myers1-2/+6
One of the cases of the SSE4.2 pcmpestri / pcmpestrm / pcmpistri / pcmpistrm instructions does a substring search. The implementation of this case in the pcmpxstrx helper is incorrect. The operation in this case is a search for a string (argument d to the helper) in another string (argument s to the helper); if a copy of d at a particular position would run off the end of s, the resulting output bit should be 0 whether or not the strings match in the region where they overlap, but the QEMU implementation was wrongly comparing only up to the point where s ends and counting it as a match if an initial segment of d matched a terminal segment of s. Here, "run off the end of s" means that some byte of d would overlap some byte outside of s; thus, if d has zero length, it is considered to match everywhere, including after the end of s. This patch fixes the implementation to correspond with the proper instruction semantics. This fixes four gcc test failures in my GCC 6-based testing. Signed-off-by: Joseph Myers <joseph@codesourcery.com> Message-Id: <alpine.DEB.2.20.1708102139310.8101@digraph.polyomino.org.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-09-19target/i386: fix packusdw in-place operationJoseph Myers1-8/+11
The SSE4.1 packusdw instruction combines source and destination vectors of signed 32-bit integers into a single vector of unsigned 16-bit integers, with unsigned saturation. When the source and destination are the same register, this means each 32-bit element of that register is used twice as an input, to produce two of the 16-bit output elements, and so if the operation is carried out element-by-element in-place, no matter what the order in which it is applied to the elements, the first element's operation will overwrite some future input. The helper for packssdw avoids this issue by computing the result in a local temporary and copying it to the destination at the end; this patch fixes the packusdw helper to do likewise. This fixes three gcc test failures in my GCC 6-based testing. Signed-off-by: Joseph Myers <joseph@codesourcery.com> Message-Id: <alpine.DEB.2.20.1708100023050.9262@digraph.polyomino.org.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-09-19target/i386: set rip_offset for further SSE instructionsJoseph Myers1-1/+2
It turns out that my recent fix to set rip_offset when emulating some SSE4.1 instructions needs generalizing to cover a wider class of instructions. Specifically, every instruction in the sse_op_table7 table, coming from various instruction set extensions, has an 8-bit immediate operand that comes after any memory operand, and so needs rip_offset set for correctness if there is a memory operand that is rip-relative, and my patch only set it for a subset of those instructions. This patch moves the rip_offset setting to cover the wider class of instructions, so fixing 9 further gcc testsuite failures in my GCC 6-based testing. (I do not know whether there might be still further classes of instructions missing this setting.) Signed-off-by: Joseph Myers <joseph@codesourcery.com> Message-Id: <alpine.DEB.2.20.1708082350340.23380@digraph.polyomino.org.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-09-19target/i386: fix pmovsx/pmovzx in-place operationsJoseph Myers1-7/+7
The SSE4.1 pmovsx* and pmovzx* instructions take packed 1-byte, 2-byte or 4-byte inputs and sign-extend or zero-extend them to a wider vector output. The associated helpers for these instructions do the extension on each element in turn, starting with the lowest. If the input and output are the same register, this means that all the input elements after the first have been overwritten before they are read. This patch makes the helpers extend starting with the highest element, not the lowest, to avoid such overwriting. This fixes many GCC test failures (161 in the gcc testsuite in my GCC 6-based testing) when testing with a default CPU setting enabling those instructions. Signed-off-by: Joseph Myers <joseph@codesourcery.com> Message-Id: <alpine.DEB.2.20.1708082018390.23380@digraph.polyomino.org.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-09-15Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.11-20170915' ↵Peter Maydell1-1/+1
into staging ppc patch queue 2017-09-15 Here's the current batch of accumulated ppc patches. These are all pretty simple bugfixes or cleanups, no big new features here. # gpg: Signature made Fri 15 Sep 2017 04:50:00 BST # gpg: using RSA key 0x6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-2.11-20170915: ppc/kvm: use kvm_vm_check_extension() in kvmppc_is_pr() spapr_events: use QTAILQ_FOREACH_SAFE() in spapr_clear_pending_events() spapr_cpu_core: cleaning up qdev_get_machine() calls spapr_pci: don't create 64-bit MMIO window if we don't need to spapr_pci: convert sprintf() to g_strdup_printf() spapr_cpu_core: fail gracefully with non-pseries machine types xics: fix several error leaks vfio, spapr: Fix levels calculation spapr_pci: handle FDT creation errors with _FDT() spapr_pci: use the common _FDT() helper spapr: fix CAS-generated reset ppc/xive: fix OV5_XIVE_EXPLOIT bits spapr: only update SDR1 once per-cpu during CAS spapr_pci: use g_strdup_printf() spapr_pci: drop useless check in spapr_populate_pci_child_dt() spapr_pci: drop useless check in spapr_phb_vfio_get_loc_code() hw/ppc/spapr.c: cleaning up qdev_get_machine() calls net: Add SunGEM device emulation as found on Apple UniNorth Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-09-15ppc/kvm: use kvm_vm_check_extension() in kvmppc_is_pr()Greg Kurz1-1/+1
If the host has both KVM PR and KVM HV loaded and we pass: -machine pseries,accel=kvm,kvm-type=PR the kvmppc_is_pr() returns false instead of true. Since the helper is mostly used as fallback, it doesn't have any real impact with recent kernels. A notable exception is the workaround to allow migration between compatible hosts with different PVRs (eg, POWER8 and POWER8E), since KVM still doesn't provide a way to check if a specific PVR is supported (see commit c363a37a450f for details). According to the official KVM API documentation [1], KVM_PPC_GET_PVINFO is "vm ioctl", but we check it as a global ioctl. The following function in KVM is hence called with kvm == NULL and considers we're in HV mode. int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) { int r; /* Assume we're using HV mode when the HV module is loaded */ int hv_enabled = kvmppc_hv_ops ? 1 : 0; if (kvm) { /* * Hooray - we know which VM type we're running on. Depend on * that rather than the guess above. */ hv_enabled = is_kvmppc_hv_enabled(kvm); } Let's use kvm_vm_check_extension() to fix the issue. [1] https://www.kernel.org/doc/Documentation/virtual/kvm/api.txt Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-14target/arm: Avoid an extra temporary for store_exclusiveRichard Henderson1-17/+9
Instead of copying addr to a local temp, reuse the value (which we have just compared as equal) already saved in cpu_exclusive_addr. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20170908163859.29820-1-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-09-14AArch64: Fix single stepping of ERET instructionJaroslaw Pelczar1-0/+1
Previously when single stepping through ERET instruction via GDB would result in debugger entering the "next" PC after ERET instruction. When debugging in kernel mode, this will also cause unintended behavior, because debugger will try to access memory from EL0 point of view. Signed-off-by: Jaroslaw Pelczar <j.pelczar@samsung.com> Message-id: 001c01d32895$483027f0$d89077d0$@samsung.com Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-09-14target/arm: Rename 'type' to 'excret' in do_v7m_exception_exit()Peter Maydell1-11/+12
In the v7M and v8M ARM ARM, the magic exception return values are referred to as EXC_RETURN values, and in QEMU we use V7M_EXCRET_* constants to define bits within them. Rename the 'type' variable which holds the exception return value in do_v7m_exception_exit() to excret, making it clearer that it does hold an EXC_RETURN value. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1505137930-13255-8-git-send-email-peter.maydell@linaro.org
2017-09-14target/arm: Add and use defines for EXCRET constantsPeter Maydell2-5/+19
The exception-return magic values get some new bits in v8M, which makes some bit definitions for them worthwhile. We don't use the bit definitions for the switch on the low bits which checks the return type for v7M, because this is defined in the v7M ARM ARM as a set of valid values rather than via per-bit checks. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 1505137930-13255-7-git-send-email-peter.maydell@linaro.org
2017-09-14target/arm: Remove unnecessary '| 0xf0000000' from do_v7m_exception_exit()Peter Maydell1-2/+2
In do_v7m_exception_exit(), there's no need to force the high 4 bits of 'type' to 1 when calling v7m_exception_taken(), because we know that they're always 1 or we could not have got to this "handle return to magic exception return address" code. Remove the unnecessary ORs. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 1505137930-13255-6-git-send-email-peter.maydell@linaro.org
2017-09-14target/arm: Get PRECISERR and IBUSERR the right way roundPeter Maydell1-4/+4
For a bus fault, the M profile BFSR bit PRECISERR means a bus fault on a data access, and IBUSERR means a bus fault on an instruction access. We had these the wrong way around; fix this. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1505137930-13255-4-git-send-email-peter.maydell@linaro.org
2017-09-14target/arm: Clear exclusive monitor on v7M reset, exception entry/exitPeter Maydell4-1/+19
For M profile we must clear the exclusive monitor on reset, exception entry and exception exit. We weren't doing any of these things; fix this bug. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1505137930-13255-3-git-send-email-peter.maydell@linaro.org
2017-09-14target/arm: Use M_REG_NUM_BANKS rather than hardcoding 2Peter Maydell1-16/+19
Use a symbolic constant M_REG_NUM_BANKS for the array size for registers which are banked by M profile security state, rather than hardcoding lots of 2s. Suggested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 1505137930-13255-2-git-send-email-peter.maydell@linaro.org
2017-09-14hmp: fix "dump-quest-memory" segfault (arm)Laurent Vivier1-2/+9
Running QEMU with qemu-system-aarch64 -M none -nographic -m 256 and executing dump-guest-memory /dev/null 0 8192 results in segfault Fix by checking if we have CPU, and exit with error if there is no CPU: (qemu) dump-guest-memory /dev/null this feature or command is not currently supported Signed-off-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <20170913142036.2469-3-lvivier@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Tested-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
2017-09-14hmp: fix "dump-quest-memory" segfault (ppc)Laurent Vivier1-2/+9
Running QEMU with qemu-system-ppc64 -M none -nographic -m 256 and executing dump-guest-memory /dev/null 0 8192 results in segfault Fix by checking if we have CPU, and exit with error if there is no CPU: (qemu) dump-guest-memory /dev/null this feature or command is not currently supported Signed-off-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20170913142036.2469-2-lvivier@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
2017-09-14sparc: Fix typedef clashDr. David Alan Gilbert1-2/+2
Older compilers (rhel6) don't like redefinition of typedefs Fixes: 12a6c15ef31c98ecefa63e91ac36955383038384 Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20170914123609.497-1-dgilbert@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-09-10target/m68k: Switch fpu_rom from make_floatx80() to make_floatx80_init()Kamil Rytarowski1-22/+22
GCC 4.7.2 on SunOS reports that the values assigned to array members are not real constants: target/m68k/fpu_helper.c:32:5: error: initializer element is not constant target/m68k/fpu_helper.c:32:5: error: (near initialization for 'fpu_rom[0]') rules.mak:66: recipe for target 'target/m68k/fpu_helper.o' failed Convert the array to make_floatx80_init() to fix it. Replace floatx80_pi-like constants with make_floatx80_init() as they are defined as make_floatx80(). This fixes build on SmartOS (Joyent). Signed-off-by: Kamil Rytarowski <n54@gmx.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20170904212306.3020-1-n54@gmx.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2017-09-08Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.11-20170908' ↵Peter Maydell8-1427/+507
into staging ppc patch queue 2017-09-08 This is the first batch of ppc related patches for qemu-2.11, and it's accumulated quite a few things. Includes: * A cleanup to handling of ppc cpu models from Igor * First parts of fixes to handling of guest vs. host SMT modes from Sam Bobroff * Preliminary patches towards supporting the Sam460 board from Balaton Zoltan * Several fixes for hotplug logic * Assorted other fixes and cleanups # gpg: Signature made Fri 08 Sep 2017 06:28:42 BST # gpg: using RSA key 0x6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-2.11-20170908: (40 commits) ppc: spapr: Move VCPU ID calculation into sPAPR ppc: remove non implemented cpu models ppc: drop caching ObjectClass from PowerPCCPUAlias ppc: simplify cpu model lookup by PVR ppc: replace inter-function cyclic dependency/recurssion with 2 simple lookups ppc: make cpu alias point only to real cpu models ppc: make cpu_model translation to type consistent ppc: use macros to make cpu type name from string literal target/ppc: Remove old STATUS file PPC: KVM: Support machine option to set VSMT mode spapr: fallback to raw mode if best compat mode cannot be set during CAS hw/nvram/spapr_nvram: Device can not be created by the users hw/ppc/spapr_cpu_core: Add a proper check for spapr machine ppc4xx: Export ECB and PLB emulation ppc4xx_i2c: Move to hw/i2c ppc4xx_i2c: QOMify ppc4xx: Split off 4xx I2C emulation from ppc405_uc to its own file ppc4xx: Make MAL emulation more generic ppc4xx: Move MAL from ppc405_uc to ppc4xx_devs spapr_iommu: Realloc guest visible TCE table when hot(un)plugging vfio-pci ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-09-08Merge remote-tracking branch 'remotes/rth/tags/pull-pa-20170907' into stagingPeter Maydell1-446/+448
Conversion to TranslatorOps # gpg: Signature made Thu 07 Sep 2017 19:42:48 BST # gpg: using RSA key 0x64DF38E8AF7E215F # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-pa-20170907: target/hppa: Convert to TranslatorOps target/hppa: Convert to DisasContextBase target/hppa: Convert to DisasJumpType Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-09-08ppc: spapr: Move VCPU ID calculation into sPAPRSam Bobroff1-15/+3
Move the calculation of a CPU's VCPU ID out of the generic PPC code (ppc_cpu_realizefn()) and into sPAPR specific code (spapr_cpu_core_realize()) where it belongs. Unfortunately, due to the way things are ordered, we still need to default the VCPU ID in ppc_cpu_realizfn() but at least doing that doesn't require any interaction with sPAPR. Signed-off-by: Sam Bobroff <sam.bobroff@au1.ibm.com> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-08ppc: remove non implemented cpu modelsIgor Mammedov1-455/+0
Remove cpu models that aren't implemented and are not compiled/tested since they are under TODO ifdef which isn't defined in sources. If someone really needs a removed model he/she should add as regular one with corresponding implementation. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-08ppc: drop caching ObjectClass from PowerPCCPUAliasIgor Mammedov3-26/+2
Caching there practically doesn't give any benefits and that at slow path druring querying supported CPU list. But it introduces non conventional path of where from comes used CPU type name (kvm_ppc_register_host_cpu_type). Taking in account that kvm_ppc_register_host_cpu_type() fixes up models the aliases point to, it's sufficient to make ppc_cpu_class_by_name() translate cpu alias to correct cpu type name. So drop PowerPCCPUAlias::oc field + ppc_cpu_class_by_alias() and let ppc_cpu_class_by_name() do conversion to cpu type name, which simplifies code a little bit saving ~20LOC and trouble wondering why ppc_cpu_class_by_alias() is necessary. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-08ppc: simplify cpu model lookup by PVRIgor Mammedov1-16/+11
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-08ppc: replace inter-function cyclic dependency/recurssion with 2 simple lookupsIgor Mammedov1-30/+13
previous patches cleaned up cpu model/alias naming which allows to simplify cpu model/alias to cpu type lookup a bit byt removing recurssion and dependency of ppc_cpu_class_by_name() / ppc_cpu_class_by_alias() on each other. Besides of simplifying code it reduces it by ~15LOC. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-08ppc: make cpu alias point only to real cpu modelsIgor Mammedov2-27/+31
alias pointing to another alias forces lookup code to do recurrsive translation till real cpu model is reached. Drop this nonsence and make each alias point to cpu model that has corresponding CPU type. It will allow to drop recurrsion in cpu model translation code and actually make ppc_cpu_aliases[] content use PowerPCCPUAlias fields properly (i.e. alias goes into .alias and model goes into .model) While at it add TODO defines around aliases that point to cpu models excluded by the same TODO defines. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-08ppc: make cpu_model translation to type consistentIgor Mammedov3-378/+378
PPC handles -cpu FOO rather incosistently, i.e. it does case-insensitive matching of FOO to a CPU type (see: ppc_cpu_compare_class_name) but handles alias names as case-sensitive, as result: # qemu-system-ppc64 -M mac99 -cpu g3 qemu-system-ppc64: unable to find CPU model ' kN�U' # qemu-system-ppc64 -cpu 970MP_V1.1 qemu-system-ppc64: Unable to find sPAPR CPU Core definition while # qemu-system-ppc64 -M mac99 -cpu G3 # qemu-system-ppc64 -cpu 970MP_v1.1 start up just fine. Considering we can't take case-insensitive matching away, make it case-insensitive for all alias/type/core_type lookups. As side effect it allows to remove duplicate core types which are the same except of using different cased letters in name. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-08ppc: use macros to make cpu type name from string literalIgor Mammedov5-6/+9
Replace "-" TYPE_POWERPC_CPU when composing cpu type name from cpu model string literal and the same pattern in format strings with POWERPC_CPU_TYPE_SUFFIX and POWERPC_CPU_TYPE_NAME(model) macroses like we do in x86. Later POWERPC_CPU_TYPE_NAME() will be used to define default cpu type per machine type and as bonus it will be consistent and easy grep-able pattern across all other targets that I'm plannig to treat the same way. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-08target/ppc: Remove old STATUS fileThomas Huth1-550/+0
The target/ppc/STATUS file has seen its last real update 10 years ago - so the information in there is not up to date anymore. Since nobody seems to care about this file, let's simply remove it. Signed-off-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-08PPC: KVM: Support machine option to set VSMT modeSam Bobroff3-15/+50
KVM now allows writing to KVM_CAP_PPC_SMT which has previously been read only. Doing so causes KVM to act, for that VM, as if the host's SMT mode was the given value. This is particularly important on Power 9 systems because their default value is 1, but they are able to support values up to 8. This patch introduces a way to control this capability via a new machine property called VSMT ("Virtual SMT"). If the value is not set on the command line a default is chosen that is, when possible, compatible with legacy systems. Note that the intialization of KVM_CAP_PPC_SMT has changed slightly because it has changed (in KVM) from a global capability to a VM-specific one. This won't cause a problem on older KVMs because VM capabilities fall back to global ones. Signed-off-by: Sam Bobroff <sam.bobroff@au1.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-08ppc64: introduce e6500KONRAD Frederic3-1/+93
This introduces e6500 core. Signed-off-by: KONRAD Frederic <frederic.konrad@adacore.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-08booke206: allow to specify an mmucfg value at the initKONRAD Frederic1-4/+5
This allows to init the MMUCFG SPR with a non NULL value. Signed-off-by: KONRAD Frederic <frederic.konrad@adacore.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-08booke206: fix tlbnps for fixed size TLBKONRAD Frederic2-6/+32
Some OS don't populate the TSIZE field when using a fixed size TLB which result in a 1KB TLB. When the TLB is a fixed size TLB the TSIZE field should be ignored. Fix this wrong behavior with MAV 2.0. Signed-off-by: KONRAD Frederic <frederic.konrad@adacore.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-08booke206: fix booke206_tlbnps for mav 2.0KONRAD Frederic1-2/+2
This fixes booke206_tlbnps for MAV 2.0 by checking the MMUCFG register and return directly the right tlbnps instead of computing it from non existing field. Signed-off-by: KONRAD Frederic <frederic.konrad@adacore.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-08ppc: spapr: Make VCPU ID handling private to SPAPRSam Bobroff2-19/+1
The concept of a VCPU ID that differs from the CPU's index (cpu->cpu_index) exists only within SPAPR machines so, move the functions ppc_get_vcpu_id() and ppc_get_cpu_by_vcpu_id() into spapr.c and rename them appropriately. Signed-off-by: Sam Bobroff <sam.bobroff@au1.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-08ppc: spapr: Rename cpu_dt_id to vcpu_idSam Bobroff3-13/+13
This field actually records the VCPU ID used by KVM and, although the value is also used in the device tree it is primarily the VCPU ID so rename it as such. Signed-off-by: Sam Bobroff <sam.bobroff@au1.ibm.com> [dwg: Updated comment missed in cpu.h] Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-07target/hppa: Convert to TranslatorOpsRichard Henderson1-143/+159
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-09-07target/hppa: Convert to DisasContextBaseRichard Henderson1-9/+8
Signed-off-by: Richard Henderson <rth@twiddle.net>
generated by cgit v1.2.1 (git 2.18.0) at 2024-06-27 12:29:30 +0000