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2017-06-22Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2017-06-09-v2' ↵Peter Maydell1-7/+3
into staging QAPI patches for 2017-06-09 # gpg: Signature made Tue 20 Jun 2017 13:31:39 BST # gpg: using RSA key 0x3870B400EB918653 # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-qapi-2017-06-09-v2: (41 commits) tests/qdict: check more get_try_int() cases console: use get_uint() for "head" property i386/cpu: use get_uint() for "min-level"/"min-xlevel" properties numa: use get_uint() for "size" property pnv-core: use get_uint() for "core-pir" property pvpanic: use get_uint() for "ioport" property auxbus: use get_uint() for "addr" property arm: use get_uint() for "mp-affinity" property xen: use get_uint() for "max-ram-below-4g" property pc: use get_uint() for "hpet-intcap" property pc: use get_uint() for "apic-id" property pc: use get_uint() for "iobase" property acpi: use get_uint() for "pci-hole*" properties acpi: use get_uint() for various acpi properties acpi: use get_uint() for "acpi-pcihp-io*" properties platform-bus: use get_uint() for "addr" property bcm2835_fb: use {get, set}_uint() for "vcram-size" and "vcram-base" aspeed: use {set, get}_uint() for "ram-size" property pcihp: use get_uint() for "bsel" property pc-dimm: make "size" property uint64 ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-06-22Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20170619' into stagingPeter Maydell3-10/+38
Queued TCG patches # gpg: Signature made Mon 19 Jun 2017 19:12:06 BST # gpg: using RSA key 0xAD1270CC4DD0279B # gpg: Good signature from "Richard Henderson <rth7680@gmail.com>" # gpg: aka "Richard Henderson <rth@redhat.com>" # gpg: aka "Richard Henderson <rth@twiddle.net>" # Primary key fingerprint: 9CB1 8DDA F8E8 49AD 2AFC 16A4 AD12 70CC 4DD0 279B * remotes/rth/tags/pull-tcg-20170619: target/arm: Exit after clearing aarch64 interrupt mask target/s390x: Exit after changing PSW mask target/alpha: Use tcg_gen_lookup_and_goto_ptr tcg: Increase hit rate of lookup_tb_ptr tcg/arm: Use ldr (literal) for goto_tb tcg/arm: Try pc-relative addresses for movi tcg/arm: Remove limit on code buffer size tcg/arm: Use indirect branch for goto_tb tcg/aarch64: Use ADR in tcg_out_movi translate-all: consolidate tb init in tb_gen_code tcg: allocate TB structs before the corresponding translated code util: add cacheinfo Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-06-20Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell1-1/+2
* nbd and qemu-nbd fixes (Eric, Max) * nbd refactoring (Vladimir) * vhost-user-scsi, take N+1 (Felipe) * replace memory_region_set_fd with memory_region_init_ram_from_fd (Marc-André) * docs/ movement (Paolo) * megasas TOCTOU fixes (Paolo) * make async_safe_run_on_cpu work on kvm/hax accelerators (Paolo) * Build system and poison.h improvements (Thomas) * -accel thread=xxx fix (Thomas) * move files to accel/ (Yang Zhong) # gpg: Signature made Thu 15 Jun 2017 10:51:55 BST # gpg: using RSA key 0xBFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (41 commits) vhost-user-scsi: Introduce a vhost-user-scsi sample application vhost-user-scsi: Introduce vhost-user-scsi host device qemu-doc: include version number docs: create interop/ subdirectory include/exec/poison: Mark some CONFIG defines as poisoned, too include/exec/poison: Add missing TARGET defines nbd/server: refactor nbd_trip nbd/server: rename rc to ret nbd/server: get rid of fail: return rc nbd/server: nbd_negotiate: fix error path nbd/server: remove NBDClientNewData nbd/server: refactor nbd_co_receive_request nbd/server: get rid of EAGAIN dead code nbd/server: refactor nbd_co_send_reply nbd/server: get rid of ssize_t nbd/server: get rid of nbd_negotiate_read and friends nbd: make nbd_drop public nbd: rename read_sync and friends accel: move kvm related accelerator files into accel/ tcg: move tcg backend files into accel/tcg/ ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-06-20i386/cpu: use get_uint() for "min-level"/"min-xlevel" propertiesMarc-André Lureau1-2/+2
These are properties of TYPE_X86_CPU, defined with DEFINE_PROP_UINT32() Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20170607163635.17635-40-marcandre.lureau@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2017-06-20qapi: merge QInt and QFloat in QNumMarc-André Lureau1-5/+1
We would like to use a same QObject type to represent numbers, whether they are int, uint, or floats. Getters will allow some compatibility between the various types if the number fits other representations. Add a few more tests while at it. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20170607163635.17635-7-marcandre.lureau@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> [parse_stats_intervals() simplified a bit, comment in test_visitor_in_int_overflow() tidied up, suppress bogus warnings] Signed-off-by: Markus Armbruster <armbru@redhat.com>
2017-06-20Merge remote-tracking branch ↵Peter Maydell4-109/+138
'remotes/vivier/tags/m68k-for-2.10-pull-request' into staging # gpg: Signature made Thu 15 Jun 2017 09:16:31 BST # gpg: using RSA key 0xF30C38BD3F2FBE3C # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" # gpg: aka "Laurent Vivier <laurent@vivier.eu>" # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier/tags/m68k-for-2.10-pull-request: target-m68k: define ext_opsize target-m68k: move FPU helpers to fpu_helper.c softfloat: define 680x0 specific values target/m68k: fix V flag for CC_OP_SUBx Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-06-19target/arm: Exit after clearing aarch64 interrupt maskRichard Henderson1-1/+6
Exit to cpu loop so we reevaluate cpu_arm_hw_interrupts. Tested-by: Emilio G. Cota <cota@braap.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Emilio G. Cota <cota@braap.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-19target/s390x: Exit after changing PSW maskRichard Henderson1-4/+10
Exit to cpu loop so we reevaluate cpu_s390x_hw_interrupts. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-19target/alpha: Use tcg_gen_lookup_and_goto_ptrRichard Henderson1-5/+22
Tested-by: Emilio G. Cota <cota@braap.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-15hax-all: make async_safe_run_on_cpu safe on HAX tooPaolo Bonzini1-1/+2
While at it, drop the current_cpu assignment since this is a per-thread variable on modern QEMU. Cc: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-06-15target-m68k: define ext_opsizeLaurent Vivier1-19/+24
Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170611231633.32582-4-laurent@vivier.eu>
2017-06-15target-m68k: move FPU helpers to fpu_helper.cLaurent Vivier3-89/+113
Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170611231633.32582-3-laurent@vivier.eu>
2017-06-15target/m68k: fix V flag for CC_OP_SUBxLaurent Vivier1-1/+1
V flag for subtraction is: v = (res ^ src1) & (src1 ^ src2) (see COMPUTE_CCR() in target/m68k/helper.c) But gen_flush_flags() uses: v = (res ^ src2) & (src1 ^ src2) The problem has been found with the following program: .global _start _start: move.l #-2147483648,%d0 subq.l #1,%d0 jvc 1f move.l #1,%d1 move.l #1,%d0 trap #0 1: move.l #0,%d1 move.l #1,%d0 trap #0 It works fine (exit(1)) on real hardware, and with "-singlestep". "-singlestep" uses gen_helper_flush_flags(), whereas without "-singlestep", V flag is computed directly in gen_flush_flags(). This patch updates gen_flush_flags() to have the same result as with gen_helper_flush_flags(). Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170614203905.19657-1-laurent@vivier.eu>
2017-06-13s390x/cpumodel: wire up cpu type + id for TCGDavid Hildenbrand5-14/+16
Let's properly expose the CPU type (machine-type number) via "STORE CPU ID" and "STORE SUBSYSTEM INFORMATION". As TCG emulates basic mode, the CPU identification number has the format "Annnnn", whereby A is the CPU address, and n are parts of the CPU serial number (0 for us for now). A specification exception will be injected if the address is not aligned to a double word. Low address protection will not be checked as we're missing some more general support for that. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170609133426.11447-3-david@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-13target/s390x: rework PGM interrupt psw.addr handlingDavid Hildenbrand5-32/+49
We can tell from the program interrupt code, whether a program interrupt has to forward the address in the PGM new PSW (suppressing/terminated/completed) to point at the next instruction, or if it is nullifying and the PSW address does not have to be incremented. So let's not modify the PSW address outside of the injection path and handle this internally. We just have to handle instruction length auto detection if no valid instruction length can be provided. This should fix various program interrupt injection paths, where the PSW was not properly forwarded. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170609142156.18767-3-david@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-13target/s390x: correctly indicate PER nullificationDavid Hildenbrand1-0/+1
Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170609142156.18767-2-david@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-13Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.10-20170609' ↵Peter Maydell2-4/+5
into staging ppc patch queue 2017-06-09 This batch contains more patches to rework the pseries machine hotplug infrastructure, plus an assorted batch of bugfixes. It contains a start on fixes to restore migration from older machine types on older versions which was broken by some xics changes. There are still a few missing pieces here, though. # gpg: Signature made Fri 09 Jun 2017 06:26:03 BST # gpg: using RSA key 0x6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-2.10-20170609: Revert "spapr: fix memory hot-unplugging" xics: drop ICPStateClass::cpu_setup() handler xics: setup cpu at realize time xics: pass appropriate types to realize() handlers. xics: introduce macros for ICP/ICS link properties hw/cpu: core.c can be compiled as common object hw/ppc/spapr: Adjust firmware name for PCI bridges xics: add reset() handler to ICPStateClass pnv_core: drop reference on ICPState object during CPU realization spapr: Rework DRC name handling spapr: Fold spapr_phb_{add,remove}_pci_device() into their only callers spapr: Change DRC attach & detach methods to functions spapr: Clean up handling of DR-indicator spapr: Clean up RTAS set-indicator spapr: Don't misuse DR-indicator in spapr_recover_pending_dimm_state() spapr: Clean up DR entity sense handling pseries: Correct panic behaviour for pseries machine type spapr: fix memory leak in spapr_memory_pre_plug() target/ppc: fix memory leak in kvmppc_is_mem_backend_page_size_ok() target/ppc: pass const string to kvmppc_is_mem_backend_page_size_ok() Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-06-13Merge remote-tracking branch 'remotes/borntraeger/tags/s390x-20170608' into ↵Peter Maydell4-3/+22
staging s390x: misc fixes bunch of fixes - reject MIDA accesses for CCWs - cpumodel fixes - cross-build fix for bios - migration improvements # gpg: Signature made Thu 08 Jun 2017 14:10:29 BST # gpg: using RSA key 0x117BBC80B5A61C7C # gpg: Good signature from "Christian Borntraeger (IBM) <borntraeger@de.ibm.com>" # Primary key fingerprint: F922 9381 A334 08F9 DBAB FBCA 117B BC80 B5A6 1C7C * remotes/borntraeger/tags/s390x-20170608: s390x/cpumodel: improve defintion search without an IBC s390x/cpumodel: take care of the cpuid format bit for KVM pc-bios/s390-ccw: use STRIP variable in Makefile s390x/css: fence off MIDA s390x/css: catch section mismatch on load Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-06-08target/ppc: fix memory leak in kvmppc_is_mem_backend_page_size_ok()Greg Kurz1-0/+1
The string returned by object_property_get_str() is dynamically allocated. Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-06-08target/ppc: pass const string to kvmppc_is_mem_backend_page_size_ok()Greg Kurz2-4/+4
This function has three implementations. Two are stubs that do nothing and the third one only passes the obj_path argument to: Object *object_resolve_path(const char *path, bool *ambiguous); Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-06-07Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell8-102/+125
* virtio-scsi use-after-free fix (Fam) * SMM fixes and improvements for TCG (myself, Mihail) * irqchip and AddressSpaceDispatch cleanups and fixes (Peter) * Coverity fix (Stefano) * NBD cleanups and fixes (Vladimir, Eric, myself) * RTC accuracy improvements and code cleanups (Guangrong+Yunfang) * socket error reporting improvement (Daniel) * GDB XML description for SSE registers (Abdallah) * kvmclock update fix (Denis) * SMM memory savings (Gonglei) * -cpu 486 fix (myself) * various bugfixes (Roman, Peter, myself, Thomas) * rtc-test improvement (Guangrong) * migration throttling fix (Felipe) * create docs/ subdirectories (myself) # gpg: Signature made Wed 07 Jun 2017 17:22:07 BST # gpg: using RSA key 0xBFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (31 commits) docs: create config/, devel/ and spin/ subdirectories cpus: reset throttle_thread_scheduled after sleep kvm: don't register smram_listener when smm is off nbd: make it thread-safe, fix qcow2 over nbd target/i386: Add GDB XML description for SSE registers i386/kvm: do not zero out segment flags if segment is unusable or not present edu: fix memory leak on msi_broken platforms linuxboot_dma: compile for i486 kvmclock: update system_time_msr address forcibly nbd: Fully initialize client in case of failed negotiation sockets: improve error reporting if UNIX socket path is too long i386: fix read/write cr with icount option target/i386: use multiple CPU AddressSpaces target/i386: enable A20 automatically in system management mode virtio-scsi: Unset hotplug handler when unrealize exec: simplify phys_page_find() params nbd/client.c: use errp instead of LOG nbd: add errp to read_sync, write_sync and drop_sync nbd: add errp parameter to nbd_wr_syncv() nbd: read_sync and friends: return 0 on success ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-06-07kvm: don't register smram_listener when smm is offGonglei1-1/+3
If the user set disable smm by '-machine smm=off', we should not register smram_listener so that we can avoid waster memory in kvm since the added sencond address space. Meanwhile we should assign value of the global kvm_state before invoking the kvm_arch_init(), because pc_machine_is_smm_enabled() may use it by kvm_has_mm(). Signed-off-by: Gonglei <arei.gonglei@huawei.com> Message-Id: <1496316915-121196-1-git-send-email-arei.gonglei@huawei.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-06-07target/i386: Add GDB XML description for SSE registersAbdallah Bouassida1-4/+4
Add an XML description for SSE registers (XMM+MXCSR) for both X86 and X86-64 architectures in the GDB stub: - configure: Define gdb_xml_files for the X86 targets (32 and 64bit). - gdb-xml/i386-32bit-sse.xml & gdb-xml/i386-64bit-sse.xml: The XML files that contain a description of the XMM + MXCSR registers. - gdb-xml/i386-32bit.xml & gdb-xml/i386-64bit.xml: wrappers that include the XML file of the core registers and the other XML file of the SSE registers. - target/i386/cpu.c: Modify the gdb_core_xml_file to the new XML wrapper, modify the gdb_num_core_regs to fit the registers number defined in each XML file. Signed-off-by: Abdallah Bouassida <abdallah.bouassida@lauterbach.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-06-07i386/kvm: do not zero out segment flags if segment is unusable or not presentRoman Pen1-12/+8
This is a fix for the problem [1], where VMCB.CPL was set to 0 and interrupt was taken on userspace stack. The root cause lies in the specific AMD CPU behaviour which manifests itself as unusable segment attributes on SYSRET[2]. Here in this patch flags are not touched even segment is unusable or is not present, therefore CPL (which is stored in DPL field) should not be lost and will be successfully restored on kvm/svm kernel side. Also current patch should not break desired behavior described in this commit: 4cae9c97967a ("target-i386: kvm: clear unusable segments' flags in migration") since present bit will be dropped if segment is unusable or is not present. This is the second part of the whole fix of the corresponding problem [1], first part is related to kvm/svm kernel side and does exactly the same: segment attributes are not zeroed out. [1] Message id: CAJrWOzD6Xq==b-zYCDdFLgSRMPM-NkNuTSDFEtX=7MreT45i7Q@mail.gmail.com [2] Message id: 5d120f358612d73fc909f5bfa47e7bd082db0af0.1429841474.git.luto@kernel.org Signed-off-by: Roman Pen <roman.penyaev@profitbricks.com> Signed-off-by: Mikhail Sennikovskii <mikhail.sennikovskii@profitbricks.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Radim Krčmář <rkrcmar@redhat.com> Cc: Michael Chapman <mike@very.puzzling.org> Cc: qemu-devel@nongnu.org Message-Id: <20170601085604.12980-1-roman.penyaev@profitbricks.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-06-07i386: fix read/write cr with icount optionMihail Abakumov1-0/+12
Running Windows with icount causes a crash in instruction of write cr. This patch fixes it. Reading and writing cr cause an icount read because there are called cpu_get_apic_tpr and cpu_set_apic_tpr functions. So, there is need gen_io_start()/gen_io_end() calls. Signed-off-by: Mihail Abakumov <mikhail.abakumov@ispras.ru> Message-Id: <ffb376034ff184f2fcbe93d5317d9e76@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-06-07target/i386: use multiple CPU AddressSpacesPaolo Bonzini5-55/+47
This speeds up SMM switches. Later on it may remove the need to take the BQL, and it may also allow to reuse code between TCG and KVM. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-06-07target/i386: enable A20 automatically in system management modePaolo Bonzini3-27/+42
Ignore env->a20_mask when running in system management mode. Reported-by: Anthony Xu <anthony.xu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <1494502528-12670-1-git-send-email-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-06-07Merge remote-tracking branch ↵Peter Maydell3-0/+14
'remotes/vivier/tags/m68k-for-2.10-pull-request' into staging # gpg: Signature made Wed 07 Jun 2017 10:29:50 BST # gpg: using RSA key 0xF30C38BD3F2FBE3C # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" # gpg: aka "Laurent Vivier <laurent@vivier.eu>" # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier/tags/m68k-for-2.10-pull-request: target/m68k: implement rtd Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-06-07target/m68k: implement rtdLaurent Vivier3-0/+14
Add "Return and Deallocate" (rtd) instruction. RTD #d (SP) -> PC SP + 4 + d -> SP Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <rth@twiddle.net> Tested-By: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de> Message-Id: <20170605100014.22981-1-laurent@vivier.eu>
2017-06-06target/s390x: addressing exceptions are suppressingDavid Hildenbrand1-1/+1
We have to make the address in the old PSW point at the next instruction, as addressing exceptions are suppressing and not nullifying. I assume that there are a lot of other broken cases (as most instructions we care about are suppressing) - all trigger_pgm_exception() specifying and explicit number or ILEN_LATER look suspicious, however this is another story that might require bigger changes (and I have to understand when the address might already have been incremented first). This is needed to make an upcoming kvm-unit-test work. Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20170529121228.2789-1-david@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: mark ETF2 and ETF2-ENH facilities as availableAurelien Jarno1-0/+2
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-30-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: check alignment in CDSG in the !CONFIG_ATOMIC128 caseAurelien Jarno1-0/+2
The CDSG instruction requires a 16-byte alignement, as expressed in the MO_ALIGN_16 passed to helper_atomic_cmpxchgo_be_mmu. In the non parallel case, use check_alignment to enforce this. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170604202034.16615-4-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement STORE PAIR TO QUADWORDAurelien Jarno4-0/+33
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170604202034.16615-3-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement LOAD PAIR FROM QUADWORDAurelien Jarno4-0/+37
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170604202034.16615-2-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement TRANSLATE ONE/TWO TO ONE/TWOAurelien Jarno4-0/+85
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-29-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement TEST DECIMALAurelien Jarno4-0/+36
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-28-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement UNPACK UNICODEAurelien Jarno4-10/+60
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-27-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement UNPACK ASCIIAurelien Jarno4-0/+71
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-26-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement PACK UNICODEAurelien Jarno4-9/+40
Use a common helper with PACK ASCII as the differences are limited to the stride of the source operand. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-25-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement PACK ASCIIAurelien Jarno4-0/+54
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-24-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement MOVE LONG UNICODEAurelien Jarno4-6/+65
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-23-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement COMPARE LOGICAL LONG UNICODEAurelien Jarno5-15/+90
For that we need to make program_interrupt available to qemu-user. Fortunately there is almost nothing to change as both kvm_enabled and CONFIG_KVM evaluate to false in that case. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-22-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: improve MOVE LONG and MOVE LONG EXTENDEDAurelien Jarno2-60/+70
As MVCL and MVCLE only differ by their operands, use a common do_mvcl helper. Optimize it calling fast_memmove and fast_memset. Correctly write back addresses. Check that r1 and r2/r3 registers are even. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-21-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: fix adj_len_to_pageAurelien Jarno1-1/+1
adj_len_to_page doesn't return the correct result when the address is already page aligned and the length is bigger than a page. Fix that. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-20-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement COMPARE LOGICAL LONGAurelien Jarno4-23/+83
As CLCL and CLCLE mostly differ by their operands, use a common do_clcl helper. Another difference is that CLCL is not interruptible. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-19-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: fix COMPARE LOGICAL LONG EXTENDEDAurelien Jarno2-22/+52
There are multiple issues with the COMPARE LOGICAL LONG EXTENDED instruction: - The test between the two operands is inverted, leading to an inversion of the cc values 1 and 2. - The address and length of an operand continue to be decreased after reaching the end of this operand. These values are then wrong write back to the registers. - We should limit the amount of bytes to process, so that interrupts can be served correctly. At the same time rename dest into src1 and src into src3 to match the operand names and make the code less confusing. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-18-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: improve 24-bit and 31-bit lengths read/writeAurelien Jarno1-14/+33
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-17-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: improve 24-bit and 31-bit addresses writeAurelien Jarno1-7/+30
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-16-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: improve 24-bit and 31-bit addresses readAurelien Jarno1-40/+31
Improve fix_address to also handle the 24-bit mode. Rename fix_address to wrap_address to better explain what is changed. Replace the calls to get_address with x2 = 0 and b2 = 0 by call to wrap_address, leading to the removal of this function. Rename get_address_31fix into get_address. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-15-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-06-06target/s390x: implement MOVE ZONESAurelien Jarno4-0/+24
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20170531220129.27724-14-aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
generated by cgit v1.2.1 (git 2.18.0) at 2024-06-25 23:21:10 +0000