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2012-09-26tcg/i386: fix build with -march < i686Aurelien Jarno1-0/+2
The movcond_i32 op has to be protected with TCG_TARGET_HAS_movcond_i32 to fix the build with -march < i686. Thanks to Richard Henderson for the hint. Reported-by: Alex Barcelo <abarcelo@ac.upc.edu> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-22tcg: Remove tcg_target_get_call_iarg_regs_countStefan Weil1-6/+0
The TCG targets no longer need individual implementations. Since commit 6a18ae2d2947532d5c26439548afa0481c4529f9, 'flags' is no longer used in tcg_target_get_call_iarg_regs_count. The remaining tcg_target_get_call_iarg_regs_count is trivial and only called once. Therefore the patch eliminates it completely. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-22tcg/i386: Remove unused registers from tcg_target_call_iarg_regsStefan Weil1-8/+2
32 bit x86 hosts don't need registers for helper function arguments because they use the default stack based calling convention. Removing the registers allows simpler code for function tcg_target_get_call_iarg_regs_count. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-22tcg/i386: Add shortcuts for registers used in L constraintStefan Weil1-48/+48
While 64 bit hosts use the first three registers which are also used as function input parameters, 32 bit hosts use TCG_REG_EAX and TCG_REG_EDX which are not used in parameter passing. After defining new register macros for the registers used in L constraint, the patch replaces most occurrences of tcg_target_call_iarg_regs[0], tcg_target_call_iarg_regs[1] and tcg_target_call_iarg_regs[2] by those new macros. tcg_target_call_iarg_regs remains unchanged when it is used for input arguments (only with 64 bit hosts) before tcg_out_calli. A comment related to those registers was fixed, too. Signed-off-by: Stefan Weil <sw@weilnetz.de> [aurel32: build fix on i386, small optimization for i386 in the prologue] Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-22w64: Fix TCG helper functions with 5 argumentsStefan Weil2-1/+5
TCG uses 6 registers for function arguments on 64 bit Linux hosts, but only 4 registers on W64 hosts. Commit 2999a0b20074a7e4a58f56572bb1436749368f59 increased the number of arguments for some important helper functions from 4 to 5 which triggered a bug for W64 hosts: QEMU aborts when executing helper_lcall_real in the guest's BIOS because function tcg_target_get_call_iarg_regs_count always returned 6. As W64 has only 4 registers for arguments, the 5th argument must be passed on the stack using a correct stack offset. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21tcg-i386: Implement movcondRichard Henderson2-1/+35
Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21tcg: Introduce movcondRichard Henderson1-0/+2
Implemented with setcond if the target does not provide the optional opcode. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-19tcg/i386: allow constants in load/store opsAurelien Jarno1-13/+37
On x86, it is possible to move a constant value to memory. Add code to handle a constant argument to load/store ops. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-15Remove unused CONFIG_TCG_PASS_AREG0 and dead codeBlue Swirl2-31/+0
Now that CONFIG_TCG_PASS_AREG0 is enabled for all targets, remove dead code and support for !CONFIG_TCG_PASS_AREG0 case. Remove dyngen-exec.h and all references to it. Although included by hw/spapr_hcall.c, it does not seem to use it. Remove unused HELPER_CFLAGS. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2012-04-15tcg/i386: Add support for w64 ABIStefan Weil1-11/+28
w64 uses the registers rcx, rdx, r8 and r9 for function arguments, so it needs a different declaration of tcg_target_call_iarg_regs. rax, rcx, rdx, r8, r9, r10 and r11 may be changed by function calls. rbx, rbp, rdi, rsi, r12, r13, r14 and r15 remain unchanged by function calls. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Stefan Weil <sw@weilnetz.de>
2012-04-15tcg/i386: Use GDB JIT debugging interface only for hosts with ELFStefan Weil1-1/+5
Not all i386 / x86_64 hosts use ELF. Ask the compiler whether ELF is used. On w64, gdb crashes when ELF_HOST_MACHINE is defined. Cc: Blue Swirl <blauwirbel@gmail.com> Acked-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Stefan Weil <sw@weilnetz.de>
2012-03-24tcg: Use the GDB JIT debugging interface.Richard Henderson1-9/+105
This allows us to generate unwind info for the dynamicly generated code in the code_gen_buffer. Only i386 is converted at this point. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-18softmmu templates: optionally pass CPUState to memory access functionsBlue Swirl1-0/+57
Optionally, make memory access helpers take a parameter for CPUState instead of relying on global env. On most targets, perform simple moves to reorder registers. On i386, switch from regparm(3) calling convention to standard stack-based version. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-18i386: Remove REGPARMBlue Swirl1-56/+56
Use stack based calling convention (GCC default) for interfacing with generated code instead of register based convention (regparm(3)). Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-14Rename CPUState -> CPUArchStateAndreas Färber1-1/+1
Scripted conversion: for file in *.[hc] hw/*.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do sed -i "s/CPUState/CPUArchState/g" $file done All occurrences of CPUArchState are expected to be replaced by QOM CPUState, once all targets are QOM'ified and common fields have been extracted. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-11tcg: Improve tcg_out_label and fix its usage for w64Stefan Weil1-4/+4
tcg_out_label is always called with a third argument of pointer type which was casted to tcg_target_long. These casts can be avoided by changing the prototype of tcg_out_label. There was also a cast to long. For most hosts with sizeof(long) == sizeof(tcg_target_long) == sizeof(void *) this did not matter, but for w64 it was wrong. This is fixed now. Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Richard Henderson <rth@twiddle.net> Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-03w64: Fix data type of parameters for flush_icache_rangeStefan Weil1-1/+2
flush_icache_range takes two address parameters which must be large enough to address any address of the host. For hosts with sizeof(unsigned long) == sizeof(void *), this patch changes nothing. All currently supported hosts fall into this category. For w64 hosts, sizeof(unsigned long) is 4 while sizeof(void *) is 8, so the use of tcg_target_ulong is needed for i386 and tci (the tcg targets which work with w64). Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-12-09tcg: Remove redundant declarations of TCG_TARGET_REG_BITSStefan Weil1-5/+0
TCG_TARGET_REG_BITS is declared in tcg.h for all TCG targets. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-11-14tcg: Use TCGReg for standard tcg-target entry points.Richard Henderson1-6/+7
Including tcg_out_ld, tcg_out_st, tcg_out_mov, tcg_out_movi. Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-11-14tcg: Standardize on TCGReg as the enum for hard registersRichard Henderson1-2/+2
Most targets did not name the enum; tci used TCGRegister. Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-01tcg-i386: Introduce limited deposit supportJan Kiszka2-2/+31
x86 cannot provide an optimized generic deposit implementation. But at least for a few special cases, namely for writing bits 0..7, 8..15, and 0..15, versions using only a single instruction are feasible. Introducing such limited support improves emulating 16-bit x86 code on x86, but also rarer cases where 32-bit or 64-bit code accesses bytes or words. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-17tcg/i386: Only one call output register needed for 64 bit hostsStefan Weil1-1/+3
The second register is only needed for 32 bit hosts. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-08-21tcg: Always define all of the TCGOpcode enum members.Richard Henderson1-33/+35
By always defining these symbols, we can eliminate a lot of ifdefs. To allow this to be checked reliably, the semantics of the TCG_TARGET_HAS_* macros must be changed from def/undef to true/false. This allows even more ifdefs to be removed, converting them into C if statements. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26TCG/x86: use stack for TCG tempsBlue Swirl1-10/+12
Use stack instead of temp_buf array in CPUState for TCG temps. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26TCG/x86: use TCG_REG_CALL_STACK instead of TCG_REG_ESPBlue Swirl1-4/+4
Except for specific cases where the use of %esp changes the encoding of the instruction, it's cleaner to use TCG_REG_CALL_STACK instead of TCG_REG_ESP. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26Delegate setup of TCG temporaries to targetsBlue Swirl1-0/+2
Delegate TCG temp_buf setup to targets, so that they can use a stack frame later instead. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26cpu-exec.c: avoid AREG0 useBlue Swirl1-3/+5
Make functions take a parameter for CPUState instead of relying on global env. Pass CPUState pointer to TCG prologue, which moves it to AREG0. Thanks to Peter Maydell and Laurent Desnogues for the ARM prologue change. Revert the hacks to avoid AREG0 use on Sparc hosts. Move cpu_has_work() and cpu_pc_from_tb() from exec.h to cpu.h. Compile the file without HELPER_CFLAGS. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-10tcg-i386: fix andi r, r, 0xffAurelien Jarno1-1/+1
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-10tcg-i386: remove use of _Bool that slipped code reviewAurelien Jarno1-1/+1
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-10tcg-i386: Merge 64-bit generation.Richard Henderson2-330/+887
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-09tcg: Make some tcg-target.c routines static.Richard Henderson1-2/+2
Both tcg_target_init and tcg_target_qemu_prologue are unused outside of tcg.c. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-09tcg: Add TYPE parameter to tcg_out_mov.Richard Henderson1-18/+18
Mirror tcg_out_movi in having a TYPE parameter. This allows x86_64 to perform the move at the proper width, which may elide a REX prefix. Introduce a TCG_TYPE_REG enumerator to represent the "native width" of the host register, and to distinguish the usage from "pointer data" as represented by the existing TCG_TYPE_PTR. Update all targets to match. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-03tcg-i386: fix a typoAurelien Jarno1-1/+1
Fix a typo introduced by c28b14c694d759f39fe3ae4f8d03b567da5b93f8. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-02tcg-i386: declare tcg_out_tlb_load() inlineAurelien Jarno1-3/+4
Declare tcg_out_tlb_load() inline so that we don't loose optimisations with commit 8516a04467cb7954cdc32e8b79b4b7df56dccb16. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-02tcg-i386: Remove some ifdefs in qemu_ld/st.Richard Henderson1-47/+38
Tidy some code by replacing ifdefs by C ifs. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-02tcg-i386: Split out tlb load function.Richard Henderson1-106/+97
Share some code between qemu_ld and qemu_st. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-02tcg-i386: Swap order of TLB hit and miss paths.Richard Henderson1-92/+80
Make fallthru be TLB hit and branch be TLB miss. Doing this both improves branch prediction and will allow further cleanup. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-02tcg-i386: Split out TLB Hit path from qemu_ld/st.Richard Henderson1-95/+102
Splitting out these functions will allow further cleanups. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-02tcg-i386: Tidy data16 prefixes.Richard Henderson1-10/+18
Include it in the opcode as an extension, as with P_EXT or the REX bits in the x86-64 port. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Nuke trailing whitespace.Richard Henderson1-22/+22
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Use lea for three-operand add.Richard Henderson1-3/+20
The result is shorter than the mov+add that TCG would otherwise generate for us. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy lea.Richard Henderson1-31/+60
Implement full modrm+sib addressing mode processing. Use that in qemu_ld/st to output the LEA. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy xchg.Richard Henderson1-1/+3
Define and use OPC_XCHG_ax_r32. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy multiply.Richard Henderson1-3/+6
Define and use OPC_IMUL_GvEv{,Ib,Iz}. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy unary arithmetic.Richard Henderson1-13/+25
Define OPC_GRP3 and EXT3_FOO to match. Use them instead of bare constants. Define OPC_GRP5 and rename the existing EXT_BAR to EXT5_BAR to make it clear which extension should be used with which opcode. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy setcc.Richard Henderson1-2/+2
Define and use OPC_SETCC. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy ret.Richard Henderson1-1/+2
Define and use OPC_RET. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy calls.Richard Henderson1-22/+27
Define OPC_CALL_Jz, generated by tcg_out_calli; use the later throughout. Unify the calls within qemu_st; adjust the stack with a single pop if applicable. Define and use EXT_CALLN_Ev for indirect calls. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy push/pop.Richard Henderson1-18/+30
Move tcg_out_push/pop up in the file so that they can be used by qemu_ld/st. Define a tcg_out_pushi to be used as well. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-21tcg-i386: Tidy movi.Richard Henderson1-1/+2
Define and use OPC_MOVL_Iv. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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