| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2011-06-03 | Use the correct header in the TCG MIPS code to find cacheflush() on OpenBSD. | Brad | 1 | -0/+4 |
| 2010-04-14 | tcp/mips: Change TCG_AREG0 (fp -> s0) | Stefan Weil | 1 | -1/+1 |
| 2010-04-05 | tcg/mips: use seb/seh instructions on MIPS32R2 | Aurelien Jarno | 1 | -2/+2 |
| 2010-03-27 | tcg-mips: add guest base support | Aurelien Jarno | 1 | -0/+3 |
| 2010-03-27 | tcg-mips: implement nor | Aurelien Jarno | 1 | -1/+1 |
| 2010-03-26 | tcg: Allow target-specific implementation of NOR. | Richard Henderson | 1 | -0/+1 |
| 2010-03-26 | tcg: Allow target-specific implementation of NAND. | Richard Henderson | 1 | -0/+1 |
| 2010-03-26 | tcg: Allow target-specific implementation of EQV. | Richard Henderson | 1 | -0/+1 |
| 2010-03-26 | remove remaining occurrences AREG[1-9] and TCG_AREG[1-9] | Paolo Bonzini | 1 | -2/+0 |
| 2010-02-20 | tcg: Add comments for all optional instructions not implemented. | Richard Henderson | 1 | -1/+3 |
| 2009-12-01 | tcg: initial mips support | Aurelien Jarno | 1 | -0/+104 |
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index : peter/qemu | |
| QEMU hacking for Peter | Peter Wu |
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