peter/qemu - QEMU hacking for Peter

Age	Commit message (Collapse)	Author	Files	Lines
2010-03-26	tcg: Allow target-specific implementation of NAND.	Richard Henderson	1	-0/+1
	Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-26	tcg: Allow target-specific implementation of EQV.	Richard Henderson	1	-0/+1
	Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-26	tcg: Use TCGCond where appropriate.	Richard Henderson	1	-4/+4
	Use the TCGCond enumeration type in the brcond and setcond related prototypes in tcg-op.h and each code generator. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-26	tcg: Name the opcode enumeration.	Richard Henderson	1	-1/+1
	Give the enumeration formed from tcg-opc.h a name: TCGOpcode. Use that enumeration type instead of "int" whereever appropriate. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-26	remove remaining occurrences AREG[1-9] and TCG_AREG[1-9]	Paolo Bonzini	1	-2/+0
	Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-20	tcg: Add comments for all optional instructions not implemented.	Richard Henderson	1	-1/+3
	Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-02-09	tcg/mips: fix crash in tcg_out_qemu_ld()	Aurelien Jarno	1	-2/+2
	The address register is overriden when it corresponds to v0 and the fast path is taken, which leads to a crash. Fix that by using the a0 register instead. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-09	tcg/mips: implement setcond2	Aurelien Jarno	1	-12/+80
	Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-08	tcg/mips: implement setcond	Aurelien Jarno	1	-0/+65
	Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-01	tcg: initial mips support	Aurelien Jarno	2	-0/+1446
	Based on a patch from Arnaud Patard (Rtp) <arnaud.patard@rtp-net.org> A few words about design choices: * Two registers, at and t0, are reserved for TCG internal use. They are useful for bswap and 64-bit ops. * Most ops supports a constant argument with value 0, which is actually mapped to the zero register. * While the at register is available for constant loading, ops only support a limited range of constants. TCG does a better job doing the register allocation and constant loading by itself. There are plenty of registers available anyway. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>