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2013-10-12tcg-ppc64: Support new ldst opcodesRichard Henderson2-62/+17
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-12tcg-ppc: Support new ldst opcodesRichard Henderson2-66/+33
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-12tcg-ppc64: Convert to le/be ldst helpersRichard Henderson1-16/+22
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-12tcg-ppc: Convert to le/be ldst helpersRichard Henderson1-24/+33
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-12tcg-ppc64: Use TCGMemOp within qemu_ldst routinesRichard Henderson1-39/+45
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-12tcg-ppc: Use TCGMemOp within qemu_ldst routinesRichard Henderson1-56/+48
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-12tcg-arm: Improve GUEST_BASE qemu_ld/stRichard Henderson1-104/+116
If we pull the code to emit the actual load/store into a subroutine, we can share the reg+reg addressing mode code between softmmu and usermode. This lets us load GUEST_BASE into a temporary register rather than attempting to add it piece-wise to the address. Which lets us use movw+movt for armv7, rather than (up to) 4 adds. Code size for pre-armv7 stays the same. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-12tcg-arm: Convert to new ldst opcodesRichard Henderson2-71/+38
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-12tcg-arm: Tidy variable naming convention in qemu_ld/stRichard Henderson1-115/+115
s/addr_reg2/addrhi/ s/addr_reg/addrlo/ s/data_reg2/datahi/ s/data_reg/datalo/ Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-12tcg-arm: Convert to le/be ldst helpersRichard Henderson1-21/+29
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-12tcg-arm: Use TCGMemOp within qemu_ldst routinesRichard Henderson1-64/+61
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-12tcg-i386: Support new ldst opcodesRichard Henderson2-90/+51
No support for helpers with non-default endianness yet, but good enough to test the opcodes. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-12tcg-i386: Remove "cb" output restriction from qemu_st8 for i386Richard Henderson1-2/+8
Once we form a combined qemu_st_i32 opcode, we won't be able to have separate constraints based on size. This one is fairly easy to work around, since eax is available as a scratch register. When storing variable data, this tends to merely exchange one mov for another. E.g. -: mov %esi,%ecx ... -: mov %cl,(%edx) +: mov %esi,%eax +: mov %al,(%edx) Where we do have a regression is when storing constant data, in which we may load the constant into edi, when only ecx/ebx ought to be used. The proper way to recover this regression is to allow constants as arguments to qemu_st_i32, so that we never load the constant data into a register at all, must less the wrong register. TBD. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-12tcg-i386: Tidy softmmu routinesRichard Henderson1-249/+208
Pass two TCGReg to tcg_out_tlb_load, rather than idx+args. Move ldst_optimization routines just below tcg_out_tlb_load to avoid the need for forward declarations. Use TCGReg enum in preference to int where apprpriate. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-12tcg-i386: Use TCGMemOp within qemu_ldst routinesRichard Henderson1-64/+59
Step one in the transition, with constants passed down from tcg_out_op. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-12tcg: Use TCGMemOp for TCGLabelQemuLdst.opcRichard Henderson1-1/+1
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-10exec: Add both big- and little-endian memory helpersRichard Henderson1-16/+53
Step three in the transition: helpers not tied to the target "default" endianness. To be used when the guest uses a memory operation with non-default endianness. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-10tcg: Add qemu_ld_st_i32/64Richard Henderson14-239/+368
Step two in the transition, adding the new ldst opcodes. Keep the old opcodes around until all backends support the new opcodes. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-10tcg: Add TCGMemOpRichard Henderson1-0/+54
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-10tcg: Add tcg-be-ldst.hRichard Henderson8-158/+112
Move TCGLabelQemuLdst and related stuff out of tcg.h. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-10tcg: Add tcg-be-null.hRichard Henderson6-0/+53
This is a no-op backend data implementation, for those targets that are not currently using the load/store optimization path. This is prepatory to always requiring these functions in all backends. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-10tcg-aarch64: Update to helper_ret_*_mmu routinesRichard Henderson1-12/+16
A minimal update to use the new helpers with the return address argument. Tested-by: Claudio Fontana <claudio.fontana@linaro.org> Reviewed-by: Claudio Fontana <claudio.fontana@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-10tcg: Merge tcg_register_helper into tcg_context_initRichard Henderson2-16/+6
Eliminates the repeated checks for having created the s->helpers hash table. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-10tcg: Add tcg-runtime.c helpers to all_helpersRichard Henderson1-0/+16
For the few targets that actually use these, we'd not report them symbolicly in the tcg opcode logs. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-10tcg: Put target helper data into an array.Richard Henderson1-3/+14
One call inside of a loop to tcg_register_helper instead of hundreds of sequential calls. Presumably more icache and branch prediction friendly; resulting binary size mostly unchanged on x86_64, as we're trading 32-bit rip-relative references in .text for full 64-bit pointers in .rodata. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-10tcg: Move helper registration into tcg_context_initRichard Henderson1-1/+7
No longer needs to be done on a per-target basis. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-10tcg: Use a GHashTable for tcg_find_helperRichard Henderson2-65/+19
Slightly changes the interface, in that we now return name instead of a TCGHelperInfo structure, which goes away. Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-10tcg: Delete tcg_helper_get_name declarationRichard Henderson1-1/+0
The function was deleted in 4dc81f2822187f4503d4bdb76785cafa5b28db0b. Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-10tcg-hppa: Remove tcg backendRichard Henderson2-1954/+0
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-09Merge remote-tracking branch 'rth/tcg-arm-pull' into stagingAnthony Liguori1-170/+215
# By Richard Henderson # Via Richard Henderson * rth/tcg-arm-pull: tcg-arm: Move the tlb addend load earlier tcg-arm: Remove restriction on qemu_ld output register tcg-arm: Return register containing tlb addend tcg-arm: Move load of tlb addend into tcg_out_tlb_read tcg-arm: Use QEMU_BUILD_BUG_ON to verify constraints on tlb tcg-arm: Use strd for tcg_out_arg_reg64 tcg-arm: Rearrange slow-path qemu_ld/st tcg-arm: Use ldrd/strd for appropriate qemu_ld/st64 Message-id: 1380663109-14434-1-git-send-email-rth@twiddle.net Signed-off-by: Anthony Liguori <anthony@codemonkey.ws>
2013-10-09Merge remote-tracking branch 'sweil/tci' into stagingAnthony Liguori2-9/+4
# By Stefan Weil # Via Stefan Weil * sweil/tci: misc: Use new rotate functions bitops: Add rotate functions (rol8, ror8, ...) tci: Add implementation of rotl_i64, rotr_i64 Message-id: 1380137693-3729-1-git-send-email-sw@weilnetz.de Signed-off-by: Anthony Liguori <anthony@codemonkey.ws>
2013-10-01tcg-arm: Move the tlb addend load earlierRichard Henderson1-5/+6
There are free scheduling slots between the sequence of comparison instructions. This requires changing the register in use to avoid conflict with those compares. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-01tcg-arm: Remove restriction on qemu_ld output registerRichard Henderson1-24/+34
The main intent of the patch is to allow the tlb addend register to be changed, without tying that change to the constraint. But the most common side-effect seems to be to enable usage of ldrd with the r0,r1 pair. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-01tcg-arm: Return register containing tlb addendRichard Henderson1-29/+30
Preparatory to rescheduling the tlb load, and changing said register. Continues to use R1 for now. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-01tcg-arm: Move load of tlb addend into tcg_out_tlb_readRichard Henderson1-37/+23
This allows us to make more intelligent decisions about the relative offsets of the tlb comparator and the addend, avoiding any need of writeback addressing. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-01tcg-arm: Use QEMU_BUILD_BUG_ON to verify constraints on tlbRichard Henderson1-5/+10
One of the two constraints we already checked via #if, but the tlb offset distance was only checked at runtime. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-01tcg-arm: Use strd for tcg_out_arg_reg64Richard Henderson1-3/+10
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-01tcg-arm: Rearrange slow-path qemu_ld/stRichard Henderson1-90/+87
Use the new helper_ret_*_mmu routines. Use a conditional call to arrange for a tail-call from the store path, and to load the return address for the helper for the load path. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-01tcg-arm: Use ldrd/strd for appropriate qemu_ld/st64Richard Henderson1-5/+43
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-25misc: Use new rotate functionsStefan Weil1-8/+4
Signed-off-by: Stefan Weil <sw@weilnetz.de>
2013-09-25tci: Add implementation of rotl_i64, rotr_i64Stefan Weil1-1/+0
It is used by qemu-ppc64 when running Debian's busybox-static. Cc: qemu-stable <qemu-stable@nongnu.org> Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Richard Henderson <rth@twiddle.net>
2013-09-25tcg-ppc64: Implement CONFIG_QEMU_LDST_OPTIMIZATIONRichard Henderson1-77/+135
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-25tcg-ppc64: Add _noaddr functions for emitting forward branchesRichard Henderson1-10/+16
... rather than open-coding this stuff through the file. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-25tcg-ppc64: Streamline tcg_out_tlb_readRichard Henderson1-97/+97
Less conditional compilation. Merge an add insn with the indexed memory load insn. Load the tlb addend earlier. Avoid the address update memory form. Fix a bug in not allowing large enough tlb offsets for some guests. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-25tcg-ppc64: Implement tcg_register_jitRichard Henderson1-23/+73
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-25tcg-ppc64: Handle long offsets betterRichard Henderson1-73/+74
Previously we'd only handle 16-bit offsets from memory operand without falling back to indexed, but it's easy to use ADDIS to handle full 32-bit offsets. This also lets us unify code that existed inline in tcg_out_op for handling addition of large constants. The new R2 temporary was marked reserved for the AIX calling convention, but the register really is call-clobbered and since tcg generated code has no use for a TOC, it's available for use. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-25tcg-ppc64: Tidy register allocation orderRichard Henderson1-27/+22
Remove conditionalization from tcg_target_reg_alloc_order, relying on reserved_regs to prevent register allocation that shouldn't happen. So R11 is now present in reg_alloc_order for __APPLE__, but also now reserved. Sort reg_alloc_order into call-saved, call-clobbered, and parameters. This reduces the effect of values getting spilled and reloaded before function calls. Whether or not it is reserved, R2 (TOC) is always call-clobbered. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-25tcg-ppc64: Look through a constant function descriptorRichard Henderson1-4/+19
Especially in the user-only configurations, a direct branch into the executable may be in range. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-25tcg-ppc64: Fold constant call address into descriptor loadRichard Henderson1-3/+11
Eliminates one insn per call: : lis r2,4165 -: ori r2,r2,59616 -: ld r0,0(r2) +: ld r0,-5920(r2) : mtctr r0 -: ld r2,8(r2) +: ld r2,-5912(r2) : bctrl Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-25tcg-ppc64: Don't load the static chain from TCGRichard Henderson1-1/+0
There are no helpers that require the static chain. Signed-off-by: Richard Henderson <rth@twiddle.net>
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