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2009-03-29tcg: add _tl aliases for div/divu/rem/remuaurel321-0/+8
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6939 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-28tcg/README: fix description of bswap32_i32/i64aurel321-1/+1
Thanks to Stuart Brady for the notice. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6920 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-13tcg/x86_64: add bswap16_i{32,64} and bswap32_i64 opsaurel322-0/+13
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6838 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-13tcg/x86: add bswap16_i32 opsaurel322-0/+7
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6837 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-13tcg: update README wrt recent bswap changesaurel321-6/+7
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6834 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-13tcg: add _tl aliases to bswap16/32/64 TCG opsaurel321-0/+5
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6833 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-13tcg: add bswap16_i64 and bswap32_i64 TCG opsaurel322-0/+64
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6832 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-13tcg: optimize tcg_gen_bswap16_i32aurel321-8/+5
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6831 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-13tcg: allow bswap16_i32 to be implemented by TCG backendsaurel321-0/+3
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6830 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-13tcg: rename bswap_i32/i64 functionsaurel329-26/+26
Rename bswap_i32 into bswap32_i32 and bswap_i64 into bswap64_i64 Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6829 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-11tcg: move {not,neg}_i{32,64} definitions at the right placeaurel321-7/+7
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6811 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-11tcg: fix commit r6805aurel321-18/+6
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6810 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-10tcg-arm: fix qemu_ld64aurel321-2/+7
Emulating fldl on arm doesn't seem to work too well. It's the way qemu_ld64 is translated to arm instructions. tcg_out_ld32_12(s, COND_AL, data_reg, addr_reg, 0); tcg_out_ld32_12(s, COND_AL, data_reg2, addr_reg, 4); Consider case where data_reg==0, data_reg2==1, and addr_reg==0. First load overwrited addr_reg. So let's put an if (data_ref==addr_reg). (Pablo Virolainen) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6808 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-10tcg: update TODOaurel321-2/+1
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6807 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-10tcg/x86: add not/neg/extu/bswap/rot i32 opsaurel322-1/+48
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6806 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-10tcg: optimize logical operationsaurel321-50/+60
Simplify nand/nor/eqv and move their optimizations to and/or/xor Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6805 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-10Fix tcg after commit 6800aurel322-3/+4
The introduction of TCGV_EQUAL and not op is slightly broken. The definition of DEBUG_TCGV shows that. Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6802 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-10tcg: use TCGV_EQUAL_I{32,64}aurel321-11/+11
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6800 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-10tcg: define TCGV_EQUAL_I{32,64}aurel321-0/+3
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6799 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-09tcg: optimize nor(X, Y, Y), used on PPC for not(X, Y)aurel321-10/+18
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6798 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-09Implement TCG not ops for x86-64aurel324-0/+26
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6797 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-09tcg: don't define TCG rotation ops if they are not supportedaurel321-0/+4
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6796 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-09Implement TCG rotation ops for x86-64aurel324-4/+56
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6795 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-08Prune unused TCG_AREGsblueswir17-9/+0
Remove definitions for TCG_AREGs corresponding to AREG definitions removed in r6778. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6779 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-07Sparse fixes: truncation by castblueswir11-1/+1
Fix Sparse warnings about constant truncation caused by cast git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6737 c046a42c-6fe2-441c-8c8c-71466251a162
2009-02-11TCG: remove obsolete old_op_count profiler fieldblueswir12-3/+0
Since we don't generate any "old op" anymore, the old_op_count is unneeded. Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6614 c046a42c-6fe2-441c-8c8c-71466251a162
2009-02-11Add missing r24..r26 to callee save registersmalc1-0/+5
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6613 c046a42c-6fe2-441c-8c8c-71466251a162
2009-02-11Add missing r24..r26 to calle save registersmalc1-0/+5
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6612 c046a42c-6fe2-441c-8c8c-71466251a162
2009-02-10Add "static"blueswir12-3/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6588 c046a42c-6fe2-441c-8c8c-71466251a162
2009-02-09Fix DEBUG_TCGV compile error.aurel321-1/+1
Don't call TCGV_LOW on arg2. This section of code falls under Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6585 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-26R13 is reserved for small data area pointer by SVR4 PPC ABImalc1-0/+5
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6450 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-15global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)aliguori1-2/+2
These are references to 'loglevel' that aren't on a simple 'if (loglevel & X) qemu_log()' statement. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6340 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-15Convert references to logfile/loglevel to use qemu_log*() macrosaliguori1-4/+4
This is a large patch that changes all occurrences of logfile/loglevel global variables to use the new qemu_log*() macros. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6338 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-14Remove all traces of __powerpc__malc1-1/+1
According to $GCC/gcc/config/rs6000/rs6000-c.c _ARCH_PPC is the ubiquitous define which should be used to test whether gcc targets PowerPC, on 64bit platforms _ARCH_PPC64 will be also defined. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6301 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-03tcg: remove tcg_global_reg2_new_hack()aurel322-39/+0
This patch removes the unused tcg_global_reg2_new_hack() function, which was added in r4438 to work around a register shortage problem regarding dyngen. The only ever user of this function was removed in r4577. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6150 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-03TCG: Fix documentation of qemu_ld/st opsaurel321-11/+11
The functions defined in tcg/tcg-op.h have no _i32 or _i64 suffix, qemu_ld64 and qemu_st64 were missing from the list, and there are no 'plain' qemu_ld/qemu_st ops. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6148 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-01tcg_temp_local_new should take no parameteraurel321-2/+2
This patch removes useless type information in some calls to tcg_temp_local_new. It also removes the parameter from the macro declaration; if a target has to use a specific non-default size then it should use tcg_temp_local_new_{i32,i64}. Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6146 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-22Use the ARRAY_SIZE() macro where appropriate.malc2-2/+2
Change from v1: Avoid changing the existing coding style in certain files. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6120 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-14tcg: kill two warningsaurel322-2/+2
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6029 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-13TCG x86/x86-64: use move with zero-extend for loads/storesaurel322-0/+12
Starting with version 4.3, gcc returns the result of a function in rax/eax/ax/al instead of rax/eax, depending of the return type. As a consequence we should use a zero extend moe in TCG loads/stores. See http://gcc.gnu.org/ml/gcc/2008-01/msg00052.html for more details. A big thanks to malc who founds the problem and wrote the x86 patch. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6011 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-13Remove unnecessary trailing newlinesblueswir12-2/+0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6000 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-13Fix TARGET_LONG_BITS warning in TCGblueswir11-0/+1
Looking at tcg/tcg.c:828, the bug that the warning indicated would show up as incorrect PC shown in log, only on 32 bit big endian host emulating a 64 bit target, -d op flag enabled. Now that dyngen is gone, the patch can be applied. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5998 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-10Introduce and use cache-utils.[ch]malc3-42/+1
Thanks to Segher Boessenkool and Holis Blanchard. AIX and Darwin cache inquiry: http://gcc.gnu.org/ml/gcc-patches/2007-08/msg00388.html Auxiliary vectors: http://manugarg.googlepages.com/aboutelfauxiliaryvectors git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5973 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07Fix 64-bit targets compilation on ARM host.balrog1-6/+6
Only fix compilation, probably doesn't run. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5947 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07Some cleanups after dyngen removalaurel322-13/+8
1. hostregs_helper.h: fix comment 2. translate-all.c: rename dyngen_code(_search_pc) to tcg_gen_code(_search_pc) 3. tcg.c: - rename dyngen_table_op_count to tcg_table_op_count - no need to generate a log of dyngen ops generated - rename dyngen_code(_search_pc) to tcg_gen_code(_search_pc) 4. tcg.h: rename dyngen_code(_search_pc) to tcg_gen_code(_search_pc) Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5936 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07Some cleanups after dyngen removalaurel325-503/+38
this patch removes some now unused things after dyngen removal. 1. dyngen-exec.h: op_param, op _jmp and some associated macros are now unused; 2. Makefile.target: tcg-dyngen is not needed anymore 2. tcg/tcg-op.h, tcg/tcg-opc.h: gen-op.h is dead 3. tcg.c: - INDEX_op_end is now the first op - CONFIG_DYNGEN_OP is never defined 4. tcg.h: dyngen_op not needed anymore 5. exec-all.h: remove some ASM macros. Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5922 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07Some fixes for TCG debuggingblueswir13-7/+7
This fixes a few things after Paul's improvements for TCG debugging: - change TCGv_i64 field name to something different from TCGv_i32 - fix things in tcg that the above change made visible. Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5919 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07Remove a few dyngen and dyngen related codeaurel321-17/+4
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5914 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-01arm: Don't potentially overwrite input registers in add2, sub2.balrog1-4/+13
According to malc TCG will often genereate an add2/sub2/mul2 with low half of the output in the same register as high half of one of the inputs, so account for that. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5847 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-01Don't rely on ARM tcg_out_goto() generating just a single insn.balrog1-8/+13
Otherwise when tb_exit generates a jump beyond the pc-relative range, tcg_out_goto() spans two/three instructions and we load the tb return value from a wrong address. This is #ifdefed out currently because we take care for the jumps to be local. Problem spotted by Steffen Liebergeld. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5845 c046a42c-6fe2-441c-8c8c-71466251a162
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