From 3078e848faed0d6bf03d1ae789975abab9cb7778 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Thu, 24 Apr 2014 18:54:42 +0100 Subject: hw/arm/virt: Put GIC register banks on 64K boundaries For an AArch64 CPU which supports 64K pages, having the GIC register banks at 4K offsets is potentially awkward. Move them out to being at 64K offsets. (This is harmless for AArch32 CPUs and for AArch64 CPUs with 4K pages, so it is simpler to use the same offsets everywhere than to try to use 64K offsets only for AArch64 host CPUs.) Signed-off-by: Peter Maydell Message-id: 1398362083-17737-3-git-send-email-peter.maydell@linaro.org --- hw/arm/virt.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index ecff256dac..9c4d337b1b 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -96,10 +96,10 @@ typedef struct VirtBoardInfo { static const MemMapEntry a15memmap[] = { /* Space up to 0x8000000 is reserved for a boot ROM */ [VIRT_FLASH] = { 0, 0x8000000 }, - [VIRT_CPUPERIPHS] = { 0x8000000, 0x8000 }, + [VIRT_CPUPERIPHS] = { 0x8000000, 0x20000 }, /* GIC distributor and CPU interfaces sit inside the CPU peripheral space */ - [VIRT_GIC_DIST] = { 0x8001000, 0x1000 }, - [VIRT_GIC_CPU] = { 0x8002000, 0x1000 }, + [VIRT_GIC_DIST] = { 0x8000000, 0x10000 }, + [VIRT_GIC_CPU] = { 0x8010000, 0x10000 }, [VIRT_UART] = { 0x9000000, 0x1000 }, [VIRT_MMIO] = { 0xa000000, 0x200 }, /* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */ -- cgit v1.2.1