From 356c7ff4b699fb80ece580feb5e7a0c2ae9c93eb Mon Sep 17 00:00:00 2001 From: Naphtali Sprei Date: Thu, 16 Jul 2009 18:17:53 +0300 Subject: fix for bad macaddr of e1000 in Windows 2003 server with original MS driver The sequence of reading from eeprom is "offset by one" moved because of a false detection of a clock cycle after an eeprom reset. Keeping the last clock value after a reset keeps it in sync. Signed-off-by: Naphtali Sprei Signed-off-by: Anthony Liguori --- hw/e1000.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/hw/e1000.c b/hw/e1000.c index c4f1ccfe54..9bc444248f 100644 --- a/hw/e1000.c +++ b/hw/e1000.c @@ -261,6 +261,11 @@ set_eecd(E1000State *s, int index, uint32_t val) } if (!(val & E1000_EECD_CS)) { // rising, no CS (EEPROM reset) memset(&s->eecd_state, 0, sizeof s->eecd_state); + /* + * restore old_eecd's E1000_EECD_SK (known to be on) + * to avoid false detection of a clock edge + */ + s->eecd_state.old_eecd = E1000_EECD_SK; return; } s->eecd_state.val_in <<= 1; -- cgit v1.2.1