From 0c86b2df78fecf1d0b5017e1bab6b2607556c5ed Mon Sep 17 00:00:00 2001 From: Laurent Vivier Date: Tue, 28 Nov 2017 18:43:10 +0100 Subject: pseries: fix TCG migration Migration of pseries is broken with TCG because QEMU tries to restore KVM MMU state unconditionally. The result is a SIGSEGV in kvm_vm_ioctl(): #0 kvm_vm_ioctl (s=0x0, type=-2146390353) at qemu/accel/kvm/kvm-all.c:2032 #1 0x00000001003e3e2c in kvmppc_configure_v3_mmu (cpu=, radix=, gtse=, proc_tbl=) at qemu/target/ppc/kvm.c:396 #2 0x00000001002f8b88 in spapr_post_load (opaque=0x1019103c0, version_id=) at qemu/hw/ppc/spapr.c:1578 #3 0x000000010059e4cc in vmstate_load_state (f=0x106230000, vmsd=0x1009479e0 , opaque=0x1019103c0, version_id=) at qemu/migration/vmstate.c:165 #4 0x00000001005987e0 in vmstate_load (f=, se=) at qemu/migration/savevm.c:748 This patch fixes the problem by not calling the KVM function with the TCG mode. Fixes: d39c90f5f3 ("spapr: Fix migration of Radix guests") Signed-off-by: Laurent Vivier Reviewed-by: Suraj Jitindar Singh Signed-off-by: David Gibson --- hw/ppc/spapr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 9efddeaee5..a471de6cab 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1570,7 +1570,7 @@ static int spapr_post_load(void *opaque, int version_id) err = spapr_rtc_import_offset(&spapr->rtc, spapr->rtc_offset); } - if (spapr->patb_entry) { + if (kvm_enabled() && spapr->patb_entry) { PowerPCCPU *cpu = POWERPC_CPU(first_cpu); bool radix = !!(spapr->patb_entry & PATBE1_GR); bool gtse = !!(cpu->env.spr[SPR_LPCR] & LPCR_GTSE); -- cgit v1.2.1 From be1b21e885743c08c921846c7201ff59fe82b8b0 Mon Sep 17 00:00:00 2001 From: Kurban Mallachiev Date: Wed, 29 Nov 2017 19:22:19 +0300 Subject: target-ppc: Don't invalidate non-supported msr bits The msr invalidation code (commits 993eb and 2360b) inverts all bits except MSR_TGPR and MSR_HVB. On non PowerPC 601 processors this leads to incorrect change of excp_prefix in hreg_store_msr() function. The problem is that new msr value get multiplied by msr_mask and inverted msr does not, thus values of MSR_EP bit in new msr value and inverted msr are distinct, so that excp_prefix changes but should not. Signed-off-by: Kurban Mallachiev Signed-off-by: David Gibson --- target/ppc/machine.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/ppc/machine.c b/target/ppc/machine.c index 24117e8f31..e475206c6a 100644 --- a/target/ppc/machine.c +++ b/target/ppc/machine.c @@ -300,9 +300,9 @@ static int cpu_post_load(void *opaque, int version_id) ppc_store_sdr1(env, env->spr[SPR_SDR1]); } - /* Invalidate all msr bits except MSR_TGPR/MSR_HVB before restoring */ + /* Invalidate all supported msr bits except MSR_TGPR/MSR_HVB before restoring */ msr = env->msr; - env->msr ^= ~((1ULL << MSR_TGPR) | MSR_HVB); + env->msr ^= env->msr_mask & ~((1ULL << MSR_TGPR) | MSR_HVB); ppc_store_msr(env, msr); hreg_compute_mem_idx(env); -- cgit v1.2.1 From 768a20f3a491ed4afce73ebb65347d55251c0ebd Mon Sep 17 00:00:00 2001 From: David Gibson Date: Fri, 1 Dec 2017 16:05:33 +1100 Subject: spapr: Include "pre-plugged" DIMMS in ram size calculation at reset At guest reset time, we allocate a hash page table (HPT) for the guest based on the guest's RAM size. If dynamic HPT resizing is not available we use the maximum RAM size, if it is we use the current RAM size. But the "current RAM size" calculation is incorrect - we just use the "base" ram_size from the machine structure. This doesn't include any pluggable DIMMs that are already plugged at reset time. This means that if you try to start a 'pseries' machine with a DIMM specified on the command line that's much larger than the "base" RAM size, then the guest will get a woefully inadequate HPT. This can lead to a guest freeze during boot as it runs out of HPT space during initial MMU setup. Signed-off-by: David Gibson Reviewed-by: Greg Kurz Tested-by: Greg Kurz --- hw/ppc/spapr.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index a471de6cab..1ac7eb0f8c 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1386,7 +1386,10 @@ void spapr_setup_hpt_and_vrma(sPAPRMachineState *spapr) && !spapr_ovec_test(spapr->ov5_cas, OV5_HPT_RESIZE))) { hpt_shift = spapr_hpt_shift_for_ramsize(MACHINE(spapr)->maxram_size); } else { - hpt_shift = spapr_hpt_shift_for_ramsize(MACHINE(spapr)->ram_size); + uint64_t current_ram_size; + + current_ram_size = MACHINE(spapr)->ram_size + get_plugged_memory_size(); + hpt_shift = spapr_hpt_shift_for_ramsize(current_ram_size); } spapr_reallocate_hpt(spapr, hpt_shift, &error_fatal); -- cgit v1.2.1