From 76cb6584196b6f35d6e9b5124974d3eba643f772 Mon Sep 17 00:00:00 2001 From: Tom Musta Date: Fri, 14 Nov 2014 14:01:41 -0600 Subject: target-ppc: Altivec's mtvscr Decodes Wrong Register The Move to Vector Status and Control Register (mtvscr) instruction uses VRB as the source register. Fix the code generator to correctly decode the VRB field. That is, use "rB(ctx->opcode)" instead of "rD(ctx->opcode)". Signed-off-by: Tom Musta Signed-off-by: Alexander Graf --- target-ppc/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 910ce56ec1..d381632c86 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -6848,7 +6848,7 @@ static void gen_mtvscr(DisasContext *ctx) gen_exception(ctx, POWERPC_EXCP_VPU); return; } - p = gen_avr_ptr(rD(ctx->opcode)); + p = gen_avr_ptr(rB(ctx->opcode)); gen_helper_mtvscr(cpu_env, p); tcg_temp_free_ptr(p); } -- cgit v1.2.1