From a7c04d545a97126c9df9d96623747d8613aaf7db Mon Sep 17 00:00:00 2001 From: Aleksandar Markovic Date: Fri, 10 Jun 2016 11:57:30 +0200 Subject: softfloat: For Mips only, correct default NaN values Only for Mips platform, and only for cases when snan_bit_is_one is 0, correct default NaN values (in their 16-, 32-, and 64-bit flavors). For more info, see [1], page 84, Table 6.3 "Value Supplied When a New Quiet NaN Is Created", and [2], page 52, Table 3.7 "Default NaN Encodings". [1] "MIPS Architecture For Programmers Volume II-A: The MIPS64 Instruction Set Reference Manual", Imagination Technologies LTD, Revision 6.04, November 13, 2015 [2] "MIPS Architecture for Programmers Volume IV-j: The MIPS32 SIMD Architecture Module", Imagination Technologies LTD, Revision 1.12, February 3, 2016 Signed-off-by: Aleksandar Markovic Reviewed-by: Leon Alrae Reviewed-by: Peter Maydell Signed-off-by: Leon Alrae --- fpu/softfloat-specialize.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index 981d66573e..a1bcb46a47 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -97,7 +97,11 @@ float16 float16_default_nan(float_status *status) if (status->snan_bit_is_one) { return const_float16(0x7DFF); } else { +#if defined(TARGET_MIPS) + return const_float16(0x7E00); +#else return const_float16(0xFE00); +#endif } #endif } @@ -116,7 +120,11 @@ float32 float32_default_nan(float_status *status) if (status->snan_bit_is_one) { return const_float32(0x7FBFFFFF); } else { +#if defined(TARGET_MIPS) + return const_float32(0x7FC00000); +#else return const_float32(0xFFC00000); +#endif } #endif } @@ -135,7 +143,11 @@ float64 float64_default_nan(float_status *status) if (status->snan_bit_is_one) { return const_float64(LIT64(0x7FF7FFFFFFFFFFFF)); } else { +#if defined(TARGET_MIPS) + return const_float64(LIT64(0x7FF8000000000000)); +#else return const_float64(LIT64(0xFFF8000000000000)); +#endif } #endif } -- cgit v1.2.1