From b2123a48566ab0636b78dda6b9c37c54bff69e6b Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 29 Dec 2011 06:19:54 +0000 Subject: add L2x0/PL310 cache controller device This is just a dummy device for ARM L2 cache controllers, based on the pl310. The cache type parameter can be defined by a property value and has a meaningful default. Signed-off-by: Rob Herring Signed-off-by: Mark Langsdorf [Peter Maydell: removed stray blank line at end] Signed-off-by: Peter Maydell --- Makefile.target | 1 + 1 file changed, 1 insertion(+) (limited to 'Makefile.target') diff --git a/Makefile.target b/Makefile.target index 3261383fd3..db5e44cc29 100644 --- a/Makefile.target +++ b/Makefile.target @@ -336,6 +336,7 @@ obj-arm-y = integratorcp.o versatilepb.o arm_pic.o arm_timer.o obj-arm-y += arm_boot.o pl011.o pl031.o pl050.o pl080.o pl110.o pl181.o pl190.o obj-arm-y += versatile_pci.o obj-arm-y += realview_gic.o realview.o arm_sysctl.o arm11mpcore.o a9mpcore.o +obj-arm-y += arm_l2x0.o obj-arm-y += arm_mptimer.o obj-arm-y += armv7m.o armv7m_nvic.o stellaris.o pl022.o stellaris_enet.o obj-arm-y += pl061.o -- cgit v1.2.1