From bc72ad67543f5c5d39c005ff0ca72da37642a1fb Mon Sep 17 00:00:00 2001 From: Alex Bligh Date: Wed, 21 Aug 2013 16:03:08 +0100 Subject: aio / timers: Switch entire codebase to the new timer API This is an autogenerated patch using scripts/switch-timer-api. Switch the entire code base to using the new timer API. Note this patch may introduce some line length issues. Signed-off-by: Alex Bligh Signed-off-by: Stefan Hajnoczi --- hw/block/fdc.c | 6 +++--- hw/block/nvme.c | 20 ++++++++++---------- hw/block/pflash_cfi01.c | 2 +- hw/block/pflash_cfi02.c | 10 +++++----- 4 files changed, 19 insertions(+), 19 deletions(-) (limited to 'hw/block') diff --git a/hw/block/fdc.c b/hw/block/fdc.c index e35ed2eabb..c5a6c21215 100644 --- a/hw/block/fdc.c +++ b/hw/block/fdc.c @@ -1647,8 +1647,8 @@ static void fdctrl_handle_readid(FDCtrl *fdctrl, int direction) FDrive *cur_drv = get_cur_drv(fdctrl); cur_drv->head = (fdctrl->fifo[1] >> 2) & 1; - qemu_mod_timer(fdctrl->result_timer, - qemu_get_clock_ns(vm_clock) + (get_ticks_per_sec() / 50)); + timer_mod(fdctrl->result_timer, + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + (get_ticks_per_sec() / 50)); } static void fdctrl_handle_format_track(FDCtrl *fdctrl, int direction) @@ -2108,7 +2108,7 @@ static void fdctrl_realize_common(FDCtrl *fdctrl, Error **errp) FLOPPY_DPRINTF("init controller\n"); fdctrl->fifo = qemu_memalign(512, FD_SECTOR_LEN); fdctrl->fifo_size = 512; - fdctrl->result_timer = qemu_new_timer_ns(vm_clock, + fdctrl->result_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, fdctrl_result_timer, fdctrl); fdctrl->version = 0x90; /* Intel 82078 controller */ diff --git a/hw/block/nvme.c b/hw/block/nvme.c index 0263e5c636..5dee229734 100644 --- a/hw/block/nvme.c +++ b/hw/block/nvme.c @@ -187,7 +187,7 @@ static void nvme_enqueue_req_completion(NvmeCQueue *cq, NvmeRequest *req) assert(cq->cqid == req->sq->cqid); QTAILQ_REMOVE(&req->sq->out_req_list, req, entry); QTAILQ_INSERT_TAIL(&cq->req_list, req, entry); - qemu_mod_timer(cq->timer, qemu_get_clock_ns(vm_clock) + 500); + timer_mod(cq->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 500); } static void nvme_rw_cb(void *opaque, int ret) @@ -264,8 +264,8 @@ static uint16_t nvme_io_cmd(NvmeCtrl *n, NvmeCmd *cmd, NvmeRequest *req) static void nvme_free_sq(NvmeSQueue *sq, NvmeCtrl *n) { n->sq[sq->sqid] = NULL; - qemu_del_timer(sq->timer); - qemu_free_timer(sq->timer); + timer_del(sq->timer); + timer_free(sq->timer); g_free(sq->io_req); if (sq->sqid) { g_free(sq); @@ -327,7 +327,7 @@ static void nvme_init_sq(NvmeSQueue *sq, NvmeCtrl *n, uint64_t dma_addr, sq->io_req[i].sq = sq; QTAILQ_INSERT_TAIL(&(sq->req_list), &sq->io_req[i], entry); } - sq->timer = qemu_new_timer_ns(vm_clock, nvme_process_sq, sq); + sq->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, nvme_process_sq, sq); assert(n->cq[cqid]); cq = n->cq[cqid]; @@ -369,8 +369,8 @@ static uint16_t nvme_create_sq(NvmeCtrl *n, NvmeCmd *cmd) static void nvme_free_cq(NvmeCQueue *cq, NvmeCtrl *n) { n->cq[cq->cqid] = NULL; - qemu_del_timer(cq->timer); - qemu_free_timer(cq->timer); + timer_del(cq->timer); + timer_free(cq->timer); msix_vector_unuse(&n->parent_obj, cq->vector); if (cq->cqid) { g_free(cq); @@ -410,7 +410,7 @@ static void nvme_init_cq(NvmeCQueue *cq, NvmeCtrl *n, uint64_t dma_addr, QTAILQ_INIT(&cq->sq_list); msix_vector_use(&n->parent_obj, cq->vector); n->cq[cqid] = cq; - cq->timer = qemu_new_timer_ns(vm_clock, nvme_post_cqes, cq); + cq->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, nvme_post_cqes, cq); } static uint16_t nvme_create_cq(NvmeCtrl *n, NvmeCmd *cmd) @@ -691,9 +691,9 @@ static void nvme_process_db(NvmeCtrl *n, hwaddr addr, int val) if (start_sqs) { NvmeSQueue *sq; QTAILQ_FOREACH(sq, &cq->sq_list, entry) { - qemu_mod_timer(sq->timer, qemu_get_clock_ns(vm_clock) + 500); + timer_mod(sq->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 500); } - qemu_mod_timer(cq->timer, qemu_get_clock_ns(vm_clock) + 500); + timer_mod(cq->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 500); } if (cq->tail != cq->head) { @@ -714,7 +714,7 @@ static void nvme_process_db(NvmeCtrl *n, hwaddr addr, int val) } sq->tail = new_tail; - qemu_mod_timer(sq->timer, qemu_get_clock_ns(vm_clock) + 500); + timer_mod(sq->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 500); } } diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 825011d8cb..018a9677ba 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -613,7 +613,7 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp) pfl->ro = 0; } - pfl->timer = qemu_new_timer_ns(vm_clock, pflash_timer, pfl); + pfl->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, pflash_timer, pfl); pfl->wcycle = 0; pfl->cmd = 0; pfl->status = 0; diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index 9fc02e3d64..99445b09b9 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -430,8 +430,8 @@ static void pflash_write (pflash_t *pfl, hwaddr offset, } pfl->status = 0x00; /* Let's wait 5 seconds before chip erase is done */ - qemu_mod_timer(pfl->timer, - qemu_get_clock_ns(vm_clock) + (get_ticks_per_sec() * 5)); + timer_mod(pfl->timer, + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + (get_ticks_per_sec() * 5)); break; case 0x30: /* Sector erase */ @@ -445,8 +445,8 @@ static void pflash_write (pflash_t *pfl, hwaddr offset, } pfl->status = 0x00; /* Let's wait 1/2 second before sector erase is done */ - qemu_mod_timer(pfl->timer, - qemu_get_clock_ns(vm_clock) + (get_ticks_per_sec() / 2)); + timer_mod(pfl->timer, + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + (get_ticks_per_sec() / 2)); break; default: DPRINTF("%s: invalid command %02x (wc 5)\n", __func__, cmd); @@ -633,7 +633,7 @@ static void pflash_cfi02_realize(DeviceState *dev, Error **errp) pfl->ro = 0; } - pfl->timer = qemu_new_timer_ns(vm_clock, pflash_timer, pfl); + pfl->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, pflash_timer, pfl); pfl->wcycle = 0; pfl->cmd = 0; pfl->status = 0; -- cgit v1.2.1