From 27013bf20d5d93ac75d398aa3608604e8ad91b5a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Wed, 21 Aug 2013 18:36:35 +0200 Subject: a15mpcore: Use qemu_get_cpu() for generic timers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This simplifies the loop and aids with refactoring of CPU list. Requested-by: Peter Maydell Signed-off-by: Andreas Färber --- hw/cpu/a15mpcore.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'hw/cpu') diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c index af182da4ee..9abba67632 100644 --- a/hw/cpu/a15mpcore.c +++ b/hw/cpu/a15mpcore.c @@ -50,7 +50,6 @@ static int a15mp_priv_init(SysBusDevice *dev) SysBusDevice *busdev; const char *gictype = "arm_gic"; int i; - CPUState *cpu; if (kvm_irqchip_in_kernel()) { gictype = "kvm-arm-gic"; @@ -72,8 +71,8 @@ static int a15mp_priv_init(SysBusDevice *dev) /* Wire the outputs from each CPU's generic timer to the * appropriate GIC PPI inputs */ - for (i = 0, cpu = first_cpu; i < s->num_cpu; i++, cpu = cpu->next_cpu) { - DeviceState *cpudev = DEVICE(cpu); + for (i = 0; i < s->num_cpu; i++) { + DeviceState *cpudev = DEVICE(qemu_get_cpu(i)); int ppibase = s->num_irq - 32 + i * 32; /* physical timer; we wire it up to the non-secure timer's ID, * since a real A15 always has TrustZone but QEMU doesn't. -- cgit v1.2.1