From 9f1a029abf15751e32a4b1df99ed2b8315f9072c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Herv=C3=A9=20Poussineau?= Date: Fri, 13 Sep 2013 13:58:44 +0200 Subject: pci: remove explicit check to 64K ioport size MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This check is useless, as bigger addresses will be ignored when added to 'io' MemoryRegion, which has a size of 64K. However, some architectures don't use the 'io' MemoryRegion, like the alpha and versatile platforms. They create a PCI I/O region bigger than 64K, so let them handle PCI I/O BARs in the higher range. MST: reinstated work-around for BAR sizing. Signed-off-by: Hervé Poussineau Reviewed-by: Richard Henderson Signed-off-by: Michael S. Tsirkin --- hw/pci/pci.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'hw/pci') diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 52cbab7dc2..00554a05ac 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -1028,8 +1028,10 @@ static pcibus_t pci_bar_address(PCIDevice *d, } new_addr = pci_get_long(d->config + bar) & ~(size - 1); last_addr = new_addr + size - 1; - /* NOTE: we have only 64K ioports on PC */ - if (last_addr <= new_addr || new_addr == 0 || last_addr > UINT16_MAX) { + /* Check if 32 bit BAR wraps around explicitly. + * TODO: make priorities correct and remove this work around. + */ + if (last_addr <= new_addr || new_addr == 0 || last_addr >= UINT32_MAX) { return PCI_BAR_UNMAPPED; } return new_addr; -- cgit v1.2.1