From a53ae8e934cd54686875b5bcfc2f434244ee55d6 Mon Sep 17 00:00:00 2001 From: Marcel Apfelbaum Date: Mon, 16 Sep 2013 11:21:16 +0300 Subject: hw/pci: partially handle pci master abort A MemoryRegion with negative priority was created and it spans over all the pci address space. It "intercepts" the accesses to unassigned pci address space and will follow the pci spec: 1. returns -1 on read 2. does nothing on write Note: setting the RECEIVED MASTER ABORT bit in the STATUS register of the device that initiated the transaction will be implemented in another series Signed-off-by: Marcel Apfelbaum Acked-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/pci/pci.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'hw/pci') diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 00554a05ac..25626b8e19 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -283,6 +283,24 @@ const char *pci_root_bus_path(PCIDevice *dev) return rootbus->qbus.name; } +static uint64_t master_abort_mem_read(void *opaque, hwaddr addr, unsigned size) +{ + return -1ULL; +} + +static void master_abort_mem_write(void *opaque, hwaddr addr, uint64_t val, + unsigned size) +{ +} + +static const MemoryRegionOps master_abort_mem_ops = { + .read = master_abort_mem_read, + .write = master_abort_mem_write, + .endianness = DEVICE_LITTLE_ENDIAN, +}; + +#define MASTER_ABORT_MEM_PRIORITY INT_MIN + static void pci_bus_init(PCIBus *bus, DeviceState *parent, const char *name, MemoryRegion *address_space_mem, @@ -294,6 +312,14 @@ static void pci_bus_init(PCIBus *bus, DeviceState *parent, bus->address_space_mem = address_space_mem; bus->address_space_io = address_space_io; + + memory_region_init_io(&bus->master_abort_mem, OBJECT(bus), + &master_abort_mem_ops, bus, "pci-master-abort", + memory_region_size(bus->address_space_mem)); + memory_region_add_subregion_overlap(bus->address_space_mem, + 0, &bus->master_abort_mem, + MASTER_ABORT_MEM_PRIORITY); + /* host bridge */ QLIST_INIT(&bus->child); -- cgit v1.2.1 From d98f08f54e0882b4da1177345161afabb8d47d94 Mon Sep 17 00:00:00 2001 From: Marcel Apfelbaum Date: Mon, 7 Oct 2013 10:36:35 +0300 Subject: hw/pci: add pci wrappers for allocating and asserting irqs Interrupt pin is selected and saved into PCI_INTERRUPT_PIN register during device initialization. Devices should not call directly qemu_set_irq and specify the INTx pin on each call. Added pci_* wrappers to replace qemu_set_irq, qemu_irq_raise, qemu_irq_lower and qemu_irq_pulse, setting the irq based on PCI_INTERRUPT_PIN. Added pci_allocate_irq wrapper to be used by devices that still need PCIDevice infrastructure to assert irqs. Renamed a static method which was named already pci_set_irq. Signed-off-by: Marcel Apfelbaum Signed-off-by: Michael S. Tsirkin --- hw/pci/pci.c | 26 ++++++++++++++++++++++---- 1 file changed, 22 insertions(+), 4 deletions(-) (limited to 'hw/pci') diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 25626b8e19..ff4b697cce 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -83,7 +83,7 @@ static const TypeInfo pcie_bus_info = { static PCIBus *pci_find_bus_nr(PCIBus *bus, int bus_num); static void pci_update_mappings(PCIDevice *d); -static void pci_set_irq(void *opaque, int irq_num, int level); +static void pci_irq_handler(void *opaque, int irq_num, int level); static int pci_add_option_rom(PCIDevice *pdev, bool is_default_rom); static void pci_del_option_rom(PCIDevice *pdev); @@ -161,7 +161,7 @@ void pci_device_deassert_intx(PCIDevice *dev) { int i; for (i = 0; i < PCI_NUM_PINS; ++i) { - qemu_set_irq(dev->irq[i], 0); + pci_irq_handler(dev, i, 0); } } @@ -889,7 +889,7 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, PCIBus *bus, pci_dev->config_read = config_read; pci_dev->config_write = config_write; bus->devices[devfn] = pci_dev; - pci_dev->irq = qemu_allocate_irqs(pci_set_irq, pci_dev, PCI_NUM_PINS); + pci_dev->irq = qemu_allocate_irqs(pci_irq_handler, pci_dev, PCI_NUM_PINS); pci_dev->version_id = 2; /* Current pci device vmstate version */ return pci_dev; } @@ -1201,7 +1201,7 @@ void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int l) /* generic PCI irq support */ /* 0 <= irq_num <= 3. level must be 0 or 1 */ -static void pci_set_irq(void *opaque, int irq_num, int level) +static void pci_irq_handler(void *opaque, int irq_num, int level) { PCIDevice *pci_dev = opaque; int change; @@ -1217,6 +1217,24 @@ static void pci_set_irq(void *opaque, int irq_num, int level) pci_change_irq_level(pci_dev, irq_num, change); } +static inline int pci_intx(PCIDevice *pci_dev) +{ + return pci_get_byte(pci_dev->config + PCI_INTERRUPT_PIN) - 1; +} + +qemu_irq pci_allocate_irq(PCIDevice *pci_dev) +{ + int intx = pci_intx(pci_dev); + + return qemu_allocate_irq(pci_irq_handler, pci_dev, intx); +} + +void pci_set_irq(PCIDevice *pci_dev, int level) +{ + int intx = pci_intx(pci_dev); + pci_irq_handler(pci_dev, intx, level); +} + /* Special hooks used by device assignment */ void pci_bus_set_route_irq_fn(PCIBus *bus, pci_route_irq_fn route_intx_to_irq) { -- cgit v1.2.1 From 9e64f8a3fcc88a508990a62ecc5a1269e41272ad Mon Sep 17 00:00:00 2001 From: Marcel Apfelbaum Date: Mon, 7 Oct 2013 10:36:39 +0300 Subject: hw: set interrupts using pci irq wrappers pci_set_irq and the other pci irq wrappers use PCI_INTERRUPT_PIN config register to compute device INTx pin to assert/deassert. An irq is allocated using pci_allocate_irq wrapper only if is needed by non pci devices. Removed irq related fields from state if not used anymore. Signed-off-by: Marcel Apfelbaum Signed-off-by: Michael S. Tsirkin --- hw/pci/shpc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'hw/pci') diff --git a/hw/pci/shpc.c b/hw/pci/shpc.c index eb092fdb61..0bbd36e272 100644 --- a/hw/pci/shpc.c +++ b/hw/pci/shpc.c @@ -172,7 +172,7 @@ static void shpc_interrupt_update(PCIDevice *d) if (msi_enabled(d) && shpc->msi_requested != level) msi_notify(d, 0); else - qemu_set_irq(d->irq[0], level); + pci_set_irq(d, level); shpc->msi_requested = level; } -- cgit v1.2.1 From 5a03e708f213c716c9dde11e8ab4b23b8ca5c066 Mon Sep 17 00:00:00 2001 From: Marcel Apfelbaum Date: Mon, 7 Oct 2013 10:36:40 +0300 Subject: hw/pcie: AER and hot-plug events must use device's interrupt The fields hpev_intx and aer_intx were removed because both AER and hot-plug events must use device's interrupt. Assert/deassert interrupts using pci irq wrappers instead. Signed-off-by: Marcel Apfelbaum Signed-off-by: Michael S. Tsirkin --- hw/pci/pcie.c | 4 ++-- hw/pci/pcie_aer.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'hw/pci') diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c index 50af3c1dfe..268a696646 100644 --- a/hw/pci/pcie.c +++ b/hw/pci/pcie.c @@ -187,7 +187,7 @@ static void hotplug_event_notify(PCIDevice *dev) } else if (msi_enabled(dev)) { msi_notify(dev, pcie_cap_flags_get_vector(dev)); } else { - qemu_set_irq(dev->irq[dev->exp.hpev_intx], dev->exp.hpev_notified); + pci_set_irq(dev, dev->exp.hpev_notified); } } @@ -195,7 +195,7 @@ static void hotplug_event_clear(PCIDevice *dev) { hotplug_event_update_event_status(dev); if (!msix_enabled(dev) && !msi_enabled(dev) && !dev->exp.hpev_notified) { - qemu_set_irq(dev->irq[dev->exp.hpev_intx], 0); + pci_irq_deassert(dev); } } diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c index ca762ab09a..32aa0c61b5 100644 --- a/hw/pci/pcie_aer.c +++ b/hw/pci/pcie_aer.c @@ -285,7 +285,7 @@ static void pcie_aer_root_notify(PCIDevice *dev) } else if (msi_enabled(dev)) { msi_notify(dev, pcie_aer_root_get_vector(dev)); } else { - qemu_set_irq(dev->irq[dev->exp.aer_intx], 1); + pci_irq_assert(dev); } } @@ -768,7 +768,7 @@ void pcie_aer_root_write_config(PCIDevice *dev, uint32_t root_cmd = pci_get_long(aer_cap + PCI_ERR_ROOT_COMMAND); /* 6.2.4.1.2 Interrupt Generation */ if (!msix_enabled(dev) && !msi_enabled(dev)) { - qemu_set_irq(dev->irq[dev->exp.aer_intx], !!(root_cmd & enabled_cmd)); + pci_set_irq(dev, !!(root_cmd & enabled_cmd)); return; } -- cgit v1.2.1 From c31d04b516b183b02336f8cce65a41bd547f6f6b Mon Sep 17 00:00:00 2001 From: Marcel Apfelbaum Date: Mon, 7 Oct 2013 10:36:41 +0300 Subject: hw/pci: removed irq field from PCIDevice Instead of exposing the the irq field, pci wrappers to qemu_set_irq or qemu_irq_* can be used. Signed-off-by: Marcel Apfelbaum Signed-off-by: Michael S. Tsirkin --- hw/pci/pci.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'hw/pci') diff --git a/hw/pci/pci.c b/hw/pci/pci.c index ff4b697cce..ae23c58c14 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -889,14 +889,12 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, PCIBus *bus, pci_dev->config_read = config_read; pci_dev->config_write = config_write; bus->devices[devfn] = pci_dev; - pci_dev->irq = qemu_allocate_irqs(pci_irq_handler, pci_dev, PCI_NUM_PINS); pci_dev->version_id = 2; /* Current pci device vmstate version */ return pci_dev; } static void do_pci_unregister_device(PCIDevice *pci_dev) { - qemu_free_irqs(pci_dev->irq); pci_dev->bus->devices[pci_dev->devfn] = NULL; pci_config_free(pci_dev); -- cgit v1.2.1 From 77d6f4ea7608fe7f47c9d7beddd19191b2e852b2 Mon Sep 17 00:00:00 2001 From: "Michael S. Tsirkin" Date: Tue, 1 Oct 2013 15:39:13 +0300 Subject: pci: fix up w64 size calculation helper BAR base was calculated incorrectly. Use existing pci_bar_address to get it right. Tested-by: Igor Mammedov Reviewed-by: Igor Mammedov Signed-off-by: Michael S. Tsirkin --- hw/pci/pci.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) (limited to 'hw/pci') diff --git a/hw/pci/pci.c b/hw/pci/pci.c index ae23c58c14..a98c8a0580 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -2306,7 +2306,7 @@ static void pci_dev_get_w64(PCIBus *b, PCIDevice *dev, void *opaque) Range *range = opaque; PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev); uint16_t cmd = pci_get_word(dev->config + PCI_COMMAND); - int r; + int i; if (!(cmd & PCI_COMMAND_MEMORY)) { return; @@ -2325,17 +2325,21 @@ static void pci_dev_get_w64(PCIBus *b, PCIDevice *dev, void *opaque) range_extend(range, &pref_range); } } - for (r = 0; r < PCI_NUM_REGIONS; ++r) { - PCIIORegion *region = &dev->io_regions[r]; + for (i = 0; i < PCI_NUM_REGIONS; ++i) { + PCIIORegion *r = &dev->io_regions[i]; Range region_range; - if (!region->size || - (region->type & PCI_BASE_ADDRESS_SPACE_IO) || - !(region->type & PCI_BASE_ADDRESS_MEM_TYPE_64)) { + if (!r->size || + (r->type & PCI_BASE_ADDRESS_SPACE_IO) || + !(r->type & PCI_BASE_ADDRESS_MEM_TYPE_64)) { + continue; + } + region_range.begin = pci_bar_address(dev, i, r->type, r->size); + region_range.end = region_range.begin + r->size; + + if (region_range.begin == PCI_BAR_UNMAPPED) { continue; } - region_range.begin = pci_get_quad(dev->config + pci_bar(dev, r)); - region_range.end = region_range.begin + region->size; region_range.begin = MAX(region_range.begin, 0x1ULL << 32); -- cgit v1.2.1 From 079e3e7012a0e3ff80b4786e67f5a5d4341dcd51 Mon Sep 17 00:00:00 2001 From: "Michael S. Tsirkin" Date: Tue, 10 Sep 2013 08:43:48 +0300 Subject: pcie_host: expose UNMAPPED macro Make it possible to test unmapped status through QMP. Reviewed-by: Gerd Hoffmann Tested-by: Gerd Hoffmann Reviewed-by: Igor Mammedov Tested-by: Igor Mammedov Signed-off-by: Michael S. Tsirkin --- hw/pci/pcie_host.c | 3 --- 1 file changed, 3 deletions(-) (limited to 'hw/pci') diff --git a/hw/pci/pcie_host.c b/hw/pci/pcie_host.c index b70e5adc4b..410ac08cc6 100644 --- a/hw/pci/pcie_host.c +++ b/hw/pci/pcie_host.c @@ -104,9 +104,6 @@ static const MemoryRegionOps pcie_mmcfg_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; -/* pcie_host::base_addr == PCIE_BASE_ADDR_UNMAPPED when it isn't mapped. */ -#define PCIE_BASE_ADDR_UNMAPPED ((hwaddr)-1ULL) - int pcie_host_init(PCIExpressHost *e) { e->base_addr = PCIE_BASE_ADDR_UNMAPPED; -- cgit v1.2.1 From 6f6d282330a3c85ecbeb54dec5b57282bd177b44 Mon Sep 17 00:00:00 2001 From: "Michael S. Tsirkin" Date: Tue, 10 Sep 2013 10:15:00 +0300 Subject: pcie_host: expose address format Callers pass in the address so it's helpful for them to be able to decode it. Reviewed-by: Gerd Hoffmann Tested-by: Gerd Hoffmann Reviewed-by: Igor Mammedov Tested-by: Igor Mammedov Signed-off-by: Michael S. Tsirkin --- hw/pci/pcie_host.c | 21 --------------------- 1 file changed, 21 deletions(-) (limited to 'hw/pci') diff --git a/hw/pci/pcie_host.c b/hw/pci/pcie_host.c index 410ac08cc6..c6e1b573e1 100644 --- a/hw/pci/pcie_host.c +++ b/hw/pci/pcie_host.c @@ -24,27 +24,6 @@ #include "hw/pci/pcie_host.h" #include "exec/address-spaces.h" -/* - * PCI express mmcfig address - * bit 20 - 28: bus number - * bit 15 - 19: device number - * bit 12 - 14: function number - * bit 0 - 11: offset in configuration space of a given device - */ -#define PCIE_MMCFG_SIZE_MAX (1ULL << 28) -#define PCIE_MMCFG_SIZE_MIN (1ULL << 20) -#define PCIE_MMCFG_BUS_BIT 20 -#define PCIE_MMCFG_BUS_MASK 0x1ff -#define PCIE_MMCFG_DEVFN_BIT 12 -#define PCIE_MMCFG_DEVFN_MASK 0xff -#define PCIE_MMCFG_CONFOFFSET_MASK 0xfff -#define PCIE_MMCFG_BUS(addr) (((addr) >> PCIE_MMCFG_BUS_BIT) & \ - PCIE_MMCFG_BUS_MASK) -#define PCIE_MMCFG_DEVFN(addr) (((addr) >> PCIE_MMCFG_DEVFN_BIT) & \ - PCIE_MMCFG_DEVFN_MASK) -#define PCIE_MMCFG_CONFOFFSET(addr) ((addr) & PCIE_MMCFG_CONFOFFSET_MASK) - - /* a helper function to get a PCIDevice for a given mmconfig address */ static inline PCIDevice *pcie_dev_find_by_mmcfg_addr(PCIBus *s, uint32_t mmcfg_addr) -- cgit v1.2.1