From bd25922e737a2c90668a7bdd1e1319413a7a51f3 Mon Sep 17 00:00:00 2001 From: Scott Wood Date: Mon, 21 Jan 2013 15:53:54 +0000 Subject: PPC: e500: fix mpic_iack address MPIC+0xa0 is IACK for the current CPU. MPIC+0x200a0 is IACK for CPU 0. This fix allows EPR to work with an SMP target. Signed-off-by: Scott Wood Signed-off-by: Alexander Graf --- hw/ppc/e500.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'hw/ppc/e500.c') diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 9ccf4d1840..530f9290f0 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -505,7 +505,7 @@ void ppce500_init(PPCE500Params *params) irqs[i][OPENPIC_OUTPUT_CINT] = input[PPCE500_INPUT_CINT]; env->spr[SPR_BOOKE_PIR] = cs->cpu_index = i; env->mpic_iack = MPC8544_CCSRBAR_BASE + - MPC8544_MPIC_REGS_OFFSET + 0x200A0; + MPC8544_MPIC_REGS_OFFSET + 0xa0; ppc_booke_timers_init(cpu, 400000000, PPC_TIMER_E500); -- cgit v1.2.1