From 0903c35ddeebde56772b39cf08e7a0bae2eb39eb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Herv=C3=A9=20Poussineau?= Date: Sat, 14 Sep 2013 17:51:07 +0200 Subject: lsi: ignore write accesses to CTEST0 registers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit 53C895A datasheet says that this register is read/write, and that the value returned on read access is dependant of DMA FIFO state. However, nothing is said for written value. 53C810A datasheet gives more insight about this register: "This was a general purpose read/write register in previous SYM53C8XX family chips. Although it is still a read/write register, Symbios reserves the right to use these bits for future 53C8XX family enhancements." This prevents going to the default case, which prints an error message. Signed-off-by: Hervé Poussineau Signed-off-by: Paolo Bonzini --- hw/scsi/lsi53c895a.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'hw/scsi') diff --git a/hw/scsi/lsi53c895a.c b/hw/scsi/lsi53c895a.c index 4314efe9f0..89d934b4be 100644 --- a/hw/scsi/lsi53c895a.c +++ b/hw/scsi/lsi53c895a.c @@ -1743,6 +1743,9 @@ static void lsi_reg_writeb(LSIState *s, int offset, uint8_t val) case 0x17: /* MBOX1 */ s->mbox1 = val; break; + case 0x18: /* CTEST0 */ + /* nothing to do */ + break; case 0x1a: /* CTEST2 */ s->ctest2 = val & LSI_CTEST2_PCICIE; break; -- cgit v1.2.1